DSA00311402.pdf
by Integrated Device Technology
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IDT74LVC112A
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS DUAL
IDT74LVC112A
NEGATIVE-EDGE-TRIGGERED
J-K FLIP-FLOP WITH CLEAR
AND PRESET, 5 VOL
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Original
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Unknown
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Unknown
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Unknown
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