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    CY7C1328G-133AXIT datasheet by Cypress Semiconductor

    • 4-Mbit (256K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V
    • Original
    • Yes
    • Yes
    • Obsolete
    • Find it at Findchips.com

    CY7C1328G-133AXIT datasheet preview
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