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    CY7C1347G-166AXIT datasheet by Cypress Semiconductor

    • 4-Mbit (128K x 36) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
    • Original
    • Yes
    • Unknown
    • Obsolete
    • Find it at Findchips.com

    CY7C1347G-166AXIT datasheet preview
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