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    Part Img CY7C1360C-166AXI datasheet by Cypress Semiconductor

    • 9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
    • Original
    • Yes
    • Yes
    • Transferred
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    CY7C1360C-166AXI datasheet preview

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