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    CY7C1367C-166AXCT datasheet by Cypress Semiconductor

    • 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
    • Original
    • Yes
    • Yes
    • Transferred
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    CY7C1367C-166AXCT datasheet preview

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