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    DSAIHSC000121611.pdf

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    • PRELIMINARY CY37192V UltraLogic™ 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 n s • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation
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    DSAIHSC000121611.pdf preview Download Datasheet

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