DSA00158408.pdf by Fairchild Semiconductor

Partial File Text Revised September 2000 74F112 Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F112 contains two independent, high-speed JK flipflops with Direct Set and Clear inputs. Synchro
Datasheet Type Original
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Pb Free Unknown
Lifecycle Unknown

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74F112 74F112PC 74F112SC 74F112SJ MS-001