DSASW00213893.pdf by Integrated Silicon Solution

Partial File Text 72 Mb (2M x 36 & 4M x 18) DDR-II (Burst of 2) CIO Synchronous SRAMs . August 2010 Features · 2M x 36 or 4M x 18. · On-chip delay-locked loop (DLL) for wide data valid window. · Common da
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown

DSASW00213893.pdf preview

Download Datasheet

User Tagged Keywords

61DDB22M36 IS61DDB22M36 IS61DDB24M18

Price & Stock Powered by