DASF0047574.pdf by Cypress Semiconductor

Partial File Text CY7C1318JV18 CY7C1320JV18 18 Mbit DDR II SRAM Two Word Burst Architecture Features Functional Description 18 Mbit Density (1M x 18, 512K x 36) 300 MHz Clock for High Bandwidth
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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CY7C1318JV18 CY7C1320JV18

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