DSA00284809.pdf by PhaseLink

Partial File Text (Preliminary) PLL500-15/16 Low Phase Noise VCXO (1MHz to 18MHz) PIN CONFIGURATION FEATURES · 1 VCON 2 DIVSEL^ 3 GND 4 8 XOUT 7 OE^ 6 VDD 5 CLK
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a1111 P5001 PLL500-15 PLL500-15DC PLL500-15SC PLL500-16

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