DSAAQ0019201.pdf by Cypress Semiconductor

Partial File Text 36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features CY7C12611KV18, CY7C12761KV18 CY7C12631KV18, CY7C12651KV18 ® Functional Description The CY7C12611KV18, CY7C127
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3M Touch Systems