DSAAQ0015722.pdf
by Cypress Semiconductor
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144-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
144-Mbit QDR ® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1641KV18, CY7C1656KV18 CY7C1643KV18, CY7C164
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Original
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Unknown
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Unknown
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Unknown
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