DSA00518262.pdf by PhaseLink

Partial File Text PLL650-07 LOW COST Network LAN Clock SOURCE FEATURES · PIN CONFIGURATION Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub
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Analog devices marking Information PACKAGE SOIC_ osc xtal 25MHZ p650 l PLL650-07SC PLL650-07SC-R XTAL 25MHz XTAL 50MHZ