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3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O
FEATURES:
0 .5 M IC R O N C M O S T e c h n o lo g y E S D > 2 0 0 0 V p e r M IL -S T D -8 8 3 , M e
