This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
Data Sheet
FEATURES
Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design 6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR > 85 dBc (bandwidth = 300