DSA2IH00172311.pdf

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Partial File Text rz z S C S -T H O M S O N M(gi@iüiCTi(QM(gS MK48C02A MK48C12A CMOS 2K x 8 ZEROPOWER SRAM LOW CURRENT (1 nA @ 7 0 ' C) BATTERY INPUT FOR DATA RETENTION IN THE AB SENCE OF POWER DATA SECURIT
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