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DSA0036592.pdf
Manufacturer
Actel
Partial File Text
A d van ced v.1 54SXA Family FPGAs Specifications Output Tristate at Powerup · 100% Resource Utilization with 100% Pin Locking · 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tol
Datasheet Type
Original
ECAD Model
Part Details
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User Tagged Keywords
54SX72
A2-A20
blown fuse
CERAMIC PIN GRID ARRAY 144 pins
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