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DSAIHSC000585.pdf
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H ig h P e rf o rm a n c e 32K x32 C M O S SRA M â â A S7C 33232F II 3 2 K x 3 2 Synchronous bu rst SRAM Prelim inary information ⢠O rganization: 32,768 w ords x 32 bits ⢠F
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ECAD Model
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