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    macrocell ecl

    Abstract: 4S514
    Text: HONEYWELL DIGITAL PRODUCT bb dË J 4SS14S3 0000D43 *=1 T-42-11-13 JUNE 1985 ECL GATE ARRAY HE8000 PRO DUCT DESCRIPTION The HE8000 Gate Array Figure 1 is a 250 picosecond, 8000 equivalent gate density Very Large Scale Integra­ tion (VLSI) monolithic integrated circuit built using


    OCR Scan     		4SS14S3 0000D43 T-42-11-13 HE8000 HE8000 10K/KH macrocell ecl 4S514 PDF

    Untitled

    Abstract: No abstract text available
    Text: Preliminary - January ¡il U d l N O l O U GS72008J/TP 256K x 8 Asynchronous 10/12/15,3.3V GS72008J/TP Center Power Center Ground Functional Description Features The GS72008 is a high speed CMOS static RAM • Fast access time: 10, 12, 15ns organized as 262,144-words by 8-bits. Static design


    OCR Scan     		GS72008J/TP GS72008J/TP GS72008 144-words PDF