Contextual Info: _ bq4115Y 512Kx8 NV Pseudo SRAM Features General Description > D ata retention in the absence of power The CMOS bq4115Y is a nonvolatile pseudo sta tic RAM organized as 512K words by 8 bits. The integral control circuitry and backup battery source provide reliable nonvolatility

23Z129

Abstract: ci 4411 welding p91 schematic diagram welding inverter ic 4410 8pin IXBD 4413 IXBD4410 IXBD4411PI ixdp630 schematic diagram welding inverter control
Contextual Info: ISOSMART Half Bridge Driver Chipsets • Type Description Package IXBD4410PI IXBD4411 PI Full-Feature Low-Side Driver Full-Feature High-Side Driver 16-Pin P-DIP 16-Pin P-DIP -40 to +85°C -40 to +85°C • IXBD441 OSI IXBD4411SI Full-Feature Low-Side Driver

PN4274

Abstract: PN3641 PN3642 PN3643 PN3644 PN3645 PN3646 PN3694 PN4249 PN4250A
Contextual Info: Small Signal Transistors TO-92 Case Continued TO-92 TYPE NO. FAMILY LEAD CODE VcB O v CEO v EBO h FE 'CBO «* v C B0 (V) (V) (V) (nA) MIN *VCES MIN MIN ‘ •c e s "•C EV @ v CE @ ic (V) (V) MIN MAX (mA) VCE(SA T) @ lc 00 |mA) Cob <PF) *Crb MAX h NF •off

ED1526

Contextual Info: DOT MATRIX LCD DRIVER-CONTROLLER • DESCRIPTION The SED1526 Series are intelligent CMOS LCD controller-drivers with the ability to drive alphanumeric and graphic displays. The LSI communicates with a high-speed microprocessor, such as the Intel 80xx and 68xx

scrambler satellite v.35

Abstract: scrambler v.35 algorithm Stanford Telecommunications scrambler v.35 diagram stel2030 STEL2030B 2030B IESS-308 sCRAMBLER
Contextual Info: FEATURES FUNCTIO NAL DESCRIPTION • 9 Mbps OPERATING DATA RATE ■ CO NSTRA IN T LENGTH K = 7 Gf = 1718, G2 = 1 3 3 8 ■ M ULTIPLE DEVICES CAN BE M ULTIPLEXED TO G IVE HIGHER DATA RATES ■ O PTIM IZED INTERFACE TO OPERATE W ITH BPSK, QPSK, AND OQPSK DEMODULATORS

Contextual Info: mosaic 3 2 K x 8 SRAM MSM832-020/025/35/45 semiconductor, inc. Issue 4.1 : February 1996 Description 32,768 x 8 CMOS High Speed Static RAM The MSM832 is a high speed Static RAM organ­ ised as 32K x 8 available with access times of 20 25, 35 or 45 ns. The device is available in four

L4C381EC-40

Contextual Info: L4C381 16-bit Cascadable ALU FEATURES □ High-Speed 15ns , Low Power 16-bit Cascadable ALU □ Implements Add, Subtract, Accu­ mulate, Two's Complement, Pass, and Logic Operations □ All Registers Have a Bypass Path for Complete Flexibility □ DESC SMD No. 5962-89959