UPB569C
Abstract: BSV 10-16 2SC1457 100to550MHz UPB569G
Text: N E C / CALIFORNIA 3GE b42?m4 » 000512b 7 MNECC 7=4£V9-/3 500 MHz LOW VOLTAGE DUAL MODULUS PRESCALER UPB569C UPB569G The UPB569 is a low voltage dual modulus prescaler for operation frequency up to 500 MHz, High performance PLL frequency synthesizer systems can be realized using the UPB569,
|
OCR Scan
|
PDF
|
000212b
UPB569C
UPB569G
UPB569
UPB569,
-32/-K33,
-H54/-H55
100to550MHz
/iPB569C
PB569G
BSV 10-16
2SC1457
100to550MHz
UPB569G
|
trw 8040
Abstract: l4b00
Text: IBM11M16735B IBM11M16735C 16M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module - Buffered inputs except RAS, Data - Reduced noise (32 Vss/Vcc pins) - Buffered PDs • 16Mx72 Extended Data Out Mode DIMMs • Performance:
|
OCR Scan
|
PDF
|
IBM11M16735B
IBM11M16735C
16Mx72
104ns
50H8040
SA14-4631-02
trw 8040
l4b00
|
MC1558H
Abstract: MC1458CP
Text: MOTOROLA SC bSE TELECOM b3b72S3 D DDflSlSM 374 «MOTS MC1458,C MC1558 MOTOROLA SEMICONDUCTOR! TECHNICAL DATA (DUAL MC1741) DUAL OPERATIONAL AMPLIFIERS (Dual MC1741) Internally Compensated, High Performance Dual Operational Amplifiers SILICON M ONOLITHIC
|
OCR Scan
|
PDF
|
b3b72S3
MC1458
MC1558
MC1741)
MC1458/1558
MC1458
00SS128
MC14S8
MC1558H
MC1458CP
|
54ACQ
Abstract: 74LVQ241 74LVQ241QSC 74LVQ241SC 74LVQ241SCX 74LVQ241SJ 74LVQ241SJX LVQ241 sd1122
Text: LVQ241 National Semiconductor 74LVQ241 Low Voltage Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The LVQ241 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC
|
OCR Scan
|
PDF
|
74LVQ241
LVQ241
MIL-STD-883
54ACQ
SD1122
00flS125
bS01125
000512b
74LVQ241
74LVQ241QSC
74LVQ241SC
74LVQ241SCX
74LVQ241SJ
74LVQ241SJX
|
X13A-Q
Abstract: OXF*9 EPSON STN 1024X512 G639a
Text: S-MOS S Y S T E M S A Seiko Epson Affiliate SED1353 Color LCD Graphics Controller SED1353 TECHNICAL MANUAL Issue Date: 04/01/97 Drawing Office No. X18A-Q-001-01 C opyright 1 9 9 7 S -M O S S y s te m s Inc. All rights reserved. VDC This document, and any text derived, extracted or transmitted from it, is the sole property of S-MOS Systems Inc. and may not be used, copied,
|
OCR Scan
|
PDF
|
SED1353
X18A-Q-001-01
1353BIOS
1353M
April1997
X13A-Q
OXF*9
EPSON STN
1024X512
G639a
|
Untitled
Abstract: No abstract text available
Text: S TANDARD PRODUCT PMC-931127 PMC PMC-Sierra, Inc. ISSUE 4 PM7375 LASAR-155 LOCAL ATM SARA PHYSICAL LAYER 1. FE A TU R ES • Single-chip Peripheral Component Interface PCI Bus Local ATM Network Interface using SONET/SDH framing at 155.52 or 51.84 Mbit/s and ATM
|
OCR Scan
|
PDF
|
PMC-931127
PM7375
LASAR-155
28x28x3
000b203
|
Untitled
Abstract: No abstract text available
Text: S ta n d a rd P r o d u c t I I T# IV * ISSUE 3 P /W C -S /'era, Inc. PM5343STXC SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER FEATURES • Monolithic SONET/SDH Transport Overhead Terminating Transceiver for use in STS-1, STS-3 or STM-1 interface applications, operating at serial interface
|
OCR Scan
|
PDF
|
PM5343STXC
PM5344
|
