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    Untitled

    Abstract: No abstract text available
    Text: GTL2014 4-bit LVTTL to GTL transceiver Rev. 3 — 14 June 2012 Product data sheet 1. General description The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface with a GTL−/GTL/GTL+ bus, where GTL−/GTL/GTL+ refers to the reference voltage of the


    Original     		PDF GTL2014 GTL2014

    AN10365

    Abstract: NXP Semiconductor - standard ICs package MARKING
    Text: GTL2005 Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Rev. 07 — 3 February 2009 Product data sheet 1. General description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus. The direction pin DIR allows the part to function as either a GTL-to-TTL sampling


    Original     		PDF GTL2005 GTL2005 GTL2014, GTL2014 002aab378 GTL2005/GTL2014 GTL2005PW/G AN10365 NXP Semiconductor - standard ICs package MARKING

    GTL2005

    Abstract: GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14 095V
    Text: GTL2005 Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Rev. 05 — 6 April 2005 Product data sheet 1. General description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus. The direction pin DIR allows the part to function as either a GTL-to-TTL sampling


    Original     		PDF GTL2005 GTL2005 GTL2014 GTL2024 GTL2024 002aab378 GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14 095V

    GTL2005

    Abstract: GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14
    Text: GTL2005 Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Rev. 06 — 6 September 2007 Product data sheet 1. General description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus. The direction pin DIR allows the part to function as either a GTL-to-TTL sampling


    Original     		PDF GTL2005 GTL2005 GTL2014, GTL2014 002aab378 GTL2005/GTL2014 GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14

    GTL2005

    Abstract: GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14
    Text: GTL2005 Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Rev. 07 — 3 February 2009 Product data sheet 1. General description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus. The direction pin DIR allows the part to function as either a GTL-to-TTL sampling


    Original     		PDF GTL2005 GTL2005 GTL2014, GTL2014 002aab378 GTL2005/GTL2014 GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14

    GTL2005

    Abstract: GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14
    Text: GTL2005 Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Rev. 06 — 6 September 2007 Product data sheet 1. General description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus. The direction pin DIR allows the part to function as either a GTL-to-TTL sampling


    Original     		PDF GTL2005 GTL2005 GTL2014, GTL2014 002aab378 GTL2005/GTL2014 GTL2005PW GTL2014 JESD22-A114 JESD22-A115 JESD78 TSSOP14

    Untitled

    Abstract: No abstract text available
    Text: GTL2005 Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator Rev. 07 — 3 February 2009 Product data sheet 1. General description The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus. The direction pin DIR allows the part to function as either a GTL-to-TTL sampling


    Original     		PDF GTL2005 GTL2005 GTL2014, GTL2014 002aab378 GTL2005/GTL2014

    Untitled

    Abstract: No abstract text available
    Text: GTL2014 4-bit LVTTL to GTL transceiver Rev. 3 — 14 June 2012 Product data sheet 1. General description The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface with a GTL−/GTL/GTL+ bus, where GTL−/GTL/GTL+ refers to the reference voltage of the


    Original     		PDF GTL2014 GTL2014

    Untitled

    Abstract: No abstract text available
    Text: GTL2014 4-bit LVTTL to GTL transceiver Rev. 2 — 6 March 2012 Product data sheet 1. General description The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface with a GTL/GTL/GTL+ bus. The direction pin allows the part to function as either a GTL to LVTTL sampling receiver or


    Original     		PDF GTL2014 GTL2014 GTL2005