Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet April 1997 m icro e le ctro n ic s group Lucent Technologies Bell Labs Innovations T7903 ISA Multiport Wide Area Connection ISA-MWAC Device Features • Three wide area connection ports. Each port can be configured as a basic rate ISDN TE or NT or as
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T7903
16-channel
15-bit
SN74LS32)
SN74LS04)
T7903.
CY7C199.
SN74LS174
005002b
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI LS Is SRAM MODULE M H 2 5 6 8 A B N A -8 5 L ,-1 0 L ,-1 2 L ,-1 5 L / „ c. , wuN ^ M H 2 5 6 8 A B N A - 8 5 H ,- 1 0 H ,- 1 2 H ,- 1 5 H P B t - 1- 11 Now" 3 ^ 2097152-BU (262144-WORD BY 8-BIT) CMOS STATIC RAM it!*«“ ' . DESCRIPTION The MH2568ABNA is a 2097152-bits CMOS static RAM
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2097152-BU
262144-WORD
MH2568ABNA
2097152-bits
262144-words
M5M51008AVP,
MH2568ABNA-85L
MH2568ABNA-1OL
MH2568ABNA-12L
MH2568ABNA-15L
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Untitled
Abstract: No abstract text available
Text: Â D E “2 3 = 3 7 3 I H M 5 1 I 8 M S A /A IL S e r i e s 1,048,576-word x 16-bit Dynamic Random Access Memory Preliminary Rev. 0.0 Mar. 20,1995 The Hitachi H M 511 8 165A/AL is a CMOS dynamic RAM organized 1,048,576-word x 16-bit. It employs the most advanced CMOS technology
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HM511SM5A/AL
576-word
16-bit
HM5118165A/AL
16-bit.
mW/715
002b7b3
EMS11816SA/AL
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Untitled
Abstract: No abstract text available
Text: Idt FAST CMOS 12-BIT SYNCHRONOUS BUS EXCHANGER IDT54/74FCT162H272AT/CT/ET Integrated Device Technology, Inc. FEATURES: multiplexers for use in synchronous memory interleaving applications. All registers have a common clock and use a clock enable CExxx) on each data register to control data
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12-BIT
IDT54/74FCT162H272AT/CT/ET
12-bitports.
MIL-STD-883,
S056-1
S056-2)
S056-3)
E56-1)
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Untitled
Abstract: No abstract text available
Text: m 'iD,i754fi DD2fi73C1 C141 m- TOSHIBA TC59R0808HK PRELIMINARY 1,048,576 WORD x 8 BITS RAMBUS DYNAMIC RAM Description The TC59R0808HK Rambus Dynamic RAM DRAM is a next-generation high-speed CMOS DRAM with a 1,048,576 x 8 bits organization and built-in slave logic. The 16,384 sense amps of the DRAM core are used as cache to achieve data
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TC59R0808HK
TC59R0808HK
500MB/s.
RD0S010496
SHP36-P-1125)
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