LCMXO2-1200HC-4TG100C
Abstract: LCMXO2-256HC-4TG100I LCMXO2-1200 tn1200 lcmxo2 LCMXO2-1200HC-4TG100 LCMXO2-2000 LCMXO2-7000 MachXO2-1200 LCMXO2-4000HC
Text: MachXO2 Family Handbook HB1010 Version 01.0, November 2010 MachXO2 Family Handbook Table of Contents November 2010 Section I. MachXO2 Family Data Sheet Introduction Features . 1-1
|
Original
|
HB1010
LCMXO2-1200HC-4TG100C
LCMXO2-256HC-4TG100I
LCMXO2-1200
tn1200
lcmxo2
LCMXO2-1200HC-4TG100
LCMXO2-2000
LCMXO2-7000
MachXO2-1200
LCMXO2-4000HC
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74ACT2235 1024x9x2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS148E - DECEMBER 1990 - REVISED APRIL 1998 • Independent Asynchronous Inputs and Outputs • Access Times of 25 ns With a 50-pF Load • Data Rates up to 50 MHz • Low-Power Advanced CMOS Technology
|
OCR Scan
|
SN74ACT2235
1024x9x2
SCAS148E
50-pF
44-Pin
64-Pin
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 67C4502-35/50/65/80 a Deep First-in First-out FIFO 1024x9 C M O S Memory o> O .u cn DISTINCTIVE CHARACTERISTICS M Retransmit capability Expandable in both width an djtepth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry
|
OCR Scan
|
67C4502-35/50/65/80
1024x9
67C4502
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 57C4502-50/65/80 High Density First-in First-out FIFO 1024x9 CMOS Memory cn ~>l O Advance Information DISTINCTIVE CHARACTERISTICS RAM based FIFO 1024x9 organization Cycle times of 65/80/100 nanoseconds Asynchronous and simultaneous writes and reads Low power consumption - 80 mA maximum
|
OCR Scan
|
57C4502-50/65/80
1024x9
57C4502
|
PDF
|
AM7202
Abstract: No abstract text available
Text: A d v a n c e In f o r m a t i o n Advanced Micro Devices Am7202-40/50/65/80 High Density First-in First-out FIFO 1024x9 CM O S Memory DISTINCTIVE CHARACTERISTICS • RAM based FIFO Status flags - full, half-full, empty • 1024x9 organization Retransmit capability
|
OCR Scan
|
Am7202-40/50/65/80
1024x9
Am7202
|
PDF
|
Z/tda 7281
Abstract: No abstract text available
Text: CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1024x9 IDT7280 IDT7281 IDT7282 PRELIMINARY INFORMATION FEATURES: • • • • • • • • • • • • The 7280 is equivalent to tw o 7200 256x9 FIFOs The 7281 is equivalent to tw o 7201 512x9 FIFOs
|
OCR Scan
|
1024x9
IDT7280
IDT7281
IDT7282
256x9
512x9
1024x9
IDT7280/7281/7282
4A2S771
0G2D42fl
Z/tda 7281
|
PDF
|
AM7202
Abstract: am7202-25
Text: Advanced Micro Devices Am7202-25/35/50/65/80 CMOS First-In First Out FIFO 1024x9-Bit Buffer DISTINCTIVE CHARACTERISTICS • RAM based FIFO Status flags - full, half-full, empty • 1024x9 organization Retransmit capability • Cycle times of 35/45/65/80/100 nanoseconds
|
OCR Scan
|
Am7202-25/35/50/65/80
1024x9
1024x9-Bit
Am7202
am7202-25
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 2048x 9-BitRFO- Radiation Hardened 7203ERP CMOS epi Parallel Cascadeable FIFO DATA INPUTS ‘ D O -0 8 For Space Applications Ü WRITE POINTER s . RAM ARRAY 512x9 1024x9 2040x9 K= READ POINTER UJ-L1I I,I THREE El's 7 2 0 3 ERP (RP for STATE BUFFERS RAD-PAK ) high speed
|
OCR Scan
|
2048x
7203ERP
512x9
1024x9
2040x9
7203ERP
CY7C429
TD11241
|
PDF
|
Untitled
Abstract: No abstract text available
Text: KM75C02A CMOS FIFO First-in First-out FIFO 1024x9 CMOS Memory FEATURES DESCRIPTION • F irst-in, F irs t-o u t dual p o rt m em ory — 1024 x 9 organization • Very high speed independent o f de p th /w id th — 20 ns cycle tim es • Asynchronous and sim ultaneous read and w rite
|
OCR Scan
|
KM75C02A
1024x9
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DALLAS SEMICONDUCTOR DS2010 1024x9 FIFO Chip PIN ASSIGNMENT FEATURES • First-in, first-out memory-based architecture W C 1* 28 □ V C C 27 □ D4 • Flexible 1024 x 9 organization D SC 2 D3C 3 • Low-power HCMOS technology D 2Ü 4 24 • Asychronous and simultaneous read/write
|
OCR Scan
|
120ns
DS2010
1024x9
DS2010
DS2009
2bl4130
0001b5b
|
PDF
|
d1607
Abstract: S2010
Text: O S2010 DALLAS SEMICONDUCTOR DS2010 1024x9 FIFO Chip FEATURES PIN ASSIG NM ENT • First-in, first-out memory-based architecture C 1» DBC 2 D3C 3 W • Flexible 1024 x 9 organization • Low-power H C M O S technology D2C D iC DOC XI c FFC • Asychronous and simultaneous read/write
|
OCR Scan
|
S2010
120ns
DS2010
1024x9
32-Pin
S2010
DS2009
d1607
|
PDF
|
Untitled
Abstract: No abstract text available
Text: VIT EL IC CORP Tö VITELIC ¿'Ëj 1SD531D □□□□35b .0 | T-V6-35 PRELIMINARY V61C03 FAMILY HIGH PERFORMANCE LOW POWER 1024x9 CMOS PARALLEL FIFO MEMORY Features I • Specifications are the same as V61C01/02 except as listed. ■ First-In/First-Out Memory
|
OCR Scan
|
1SD531D
T-V6-35
V61C03
1024x9
V61C01/02
V61C03
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 67C4502-35/50/65/80 a Deep First-in First-out FIFO 1024x9 CMOS Memory Oi O cn to 1 DISTINCTIVE CHARACTERISTICS w U) Dì Retransmit capability Expandable in both width and depth Increased noise immunity for XI - CMOS threshold RAM based FIFO 1024x9 organization
|
OCR Scan
|
67C4502-35/50/65/80
1024x9
67C4502
|
PDF
|
Untitled
Abstract: No abstract text available
Text: european space agency agence spatiale européenne Pages 1 to 66 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS SILICON GATE, STATIC 9K 1024x9 BIT FIRST IN, FIRST OUT MEMORY WITH 3-STATE OUTPUTS, BASED ON TYPE M67202FV ESA/SCC Detail Specification No. 9301/032
|
OCR Scan
|
1024x9
M67202FV
CKBD-000
|
PDF
|
|
|
Untitled
Abstract: No abstract text available
Text: Am99Cl9 1 0 2 4 x 9 First-In/First-Out FIFO ADVANCE INFORMATION First-In/First-Out dual-port memory 1024x9 organization Fast cycle time - 45 ns typical • Fast throughput time > 20 MHz • Expandable by both word depth and/or bit width • Empty, half-full, and fullwarning flags
|
OCR Scan
|
Am99Cl9
Am99C19
1024x9
28-pln
600-inch)
28-pin
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 67C4502-35/50/65/80 Deep First-in First-out FIFO 1024x9 CMOS Memory a s DISTINCTIVE CHARACTERISTICS RAM based FIFO 1024x9 organization Cycle tim es of 45/65/80/100 nanoseconds Asynchronous and simultaneous writes and reads Retransmit capability Expandable in both width andjtepth
|
OCR Scan
|
67C4502-35/50/65/80
1024x9
67C4502
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 67C4502-35/50/65/80 Deep First-in First-out FIFO 1024x9 C M O S Memory a o> -vl O 4* in DISTINCTIVE CHARACTERISTICS o in Retransmit capability Expandable in both width and depth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry
|
OCR Scan
|
67C4502-35/50/65/80
1024x9
67C4502
|
PDF
|
D426
Abstract: No abstract text available
Text: Advanced Micro Devices Am7202A High Density First-In First-Out FIFO 1024x9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS • ■ ■ RAM based FIFO 1024x9 organization ■ Cycle times of 40/65 nanoseconds for APL products Asynchronous and simultaneous writes
|
OCR Scan
|
Am7202A
1024x9-Bit
1024x9
4430-016A
D426
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 67C4502-35/50/65/80 Deep First-in First-out FIFO 1024x9 C M O S Memory a o> O .u cn DISTINCTIVE CHARACTERISTICS Retransmit capability Expandable in both width an djtepth Increased noise immunity for XI • CMOS threshold Functional and pin compatible with industry
|
OCR Scan
|
67C4502-35/50/65/80
1024x9
67C4502
|
PDF
|
high level block diagram for asynchronous FIFO
Abstract: DIP28-W-300 LH540202 LJH540202
Text: LH540202 CMOS 1024 X 9 Asynchronous FIFO FEATURES FUNCTIONAL DESCRIPTION • Fast Access Times: 15/20/25/35/50 ns The LH540202 is a FIFO First-In, First-Out memory device, based onfully-staticCMOSdual-portSRAM tech nology, capable of storing up to 1024 nine-bit words. It
|
OCR Scan
|
LH540202
LH5497
ArrVIDT/MS7202
LH5497H
28-Pin,
300-mil
32-Pin
32PLCC
high level block diagram for asynchronous FIFO
DIP28-W-300
LH540202
LJH540202
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 3.3 VOLT DUAL CMOS SyncFlFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1,024 x 9, DUAL 2,048 x 9, DUAL 4,096 x 9 Integrated D ev ice TechnoJogy, S c . FEATURES: • The IDT72V801 is equivalent to two IDT72V201 256 x 9 FIFOs • The IDT72V811 is equivalent to two IDT72V211 5 1 2 x 9 FIFOs
|
OCR Scan
|
IDT72V801
IDT72V201
IDT72V811
IDT72V211
IDT72V821
IDT72V221
IDT72V831
IDT72V231
IDT72V841
IDT72V241
|
PDF
|
Untitled
Abstract: No abstract text available
Text: BUS-MATCHING BIDIRECTIONAL FIFO 512 x 1 8 -B IT -1024 x 9-BIT 1024 x 18-BIT - 2048 x 9-BIT Integrated D evice Technology, Inc. IDT72510 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays for bidirectional data transfers • 512 x 18-Bit - 1024 x 9-Bit IDT72510
|
OCR Scan
|
18-BIT
IDT72510
IDT72520
IDT72510)
IDT72520)
18-to-9-bit,
36-to-9-bit,
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO IDT72V81 DUAL 512 X 9, DUAL 1024 x 9 IDT72V82 PRELIMINARY INFORMATION Integrated Device Technology, Inc. FEATURES: single package with all associated control, data, and flag lines assigned to separate pins. The devices use Full and Empty
|
OCR Scan
|
IDT72V81
IDT72V82
2S771
D027n3
IDT72V81/72V82
S056-2)
72V81
72V82
|
PDF
|
CY7C428-65PC
Abstract: CY7C419 CY7C421 CY7C425 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203
Text: fax id: 5404 CY7C419/21/25/29/33 -= C Y P R E S S 256/512 /1K /2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1 K x 9 (CY7C425)
|
OCR Scan
|
CY7C419/21/25/29/33
CY7C419)
CY7C421)
CY7C425)
CY7C429)
CY7C433)
300-mil
600-mil
IDT7200,
IDT7201,
CY7C428-65PC
CY7C419
CY7C421
CY7C425
CY7C429
CY7C433
IDT7200
IDT7201
IDT7202
IDT7203
|
PDF
|
