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    PacTec 62290-501-039 KEU-10 Bone Prod. Unit

    Enclosures, Boxes, & Cases ProductionUnit Bone 5.1x7.1x3" No Panels
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    Mouser Electronics 62290-501-039 KEU-10 Bone Prod. Unit 737
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    PacTec 62290-510-039 KEU-10 Bone Kit

    Enclosures, Boxes, & Cases 8.1 x 10.1 x43" Bone Keyboard Kit
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    Mouser Electronics 62290-510-039 KEU-10 Bone Kit 18
    • 1 $24.35
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    PacTec 82404-510-039 PT-10 BONE Kit

    Enclosures, Boxes, & Cases 7.9 x 11 x 3 BONE PT-10 KIT
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    Mouser Electronics 82404-510-039 PT-10 BONE Kit 17
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    PacTec KEU-10 BONE KIT

    Enclosure, Desk Top, Plastic, Bone; Enclosure Type:Desktop; Enclosure Material:Plastic; External Height - Metric:101.6Mm; External Width - Metric:254Mm; External Depth - Metric:203Mm; Ip Rating:-; Body Color:Bone; Nema Rating:- Rohs Compliant: Yes |Pactec KEU-10 BONE KIT
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    Newark KEU-10 BONE KIT Bulk 24
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    ITT Interconnect Solutions Z26410-BOND

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    Master Electronics Z26410-BOND
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    10BON Datasheets Context Search

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    A115-A

    Abstract: C101 SN74GTL2007 26LVTTL
    Text: SN74GTL2007 12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCLS609 − MARCH 2005 D Operates as a GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing Done to JEDEC Standard


    Original     		SN74GTL2007 12BIT SCLS609 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2007 A115-A C101 26LVTTL PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2006 13ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCES619 – DECEMBER 2004 D Operates as GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing to JEDEC Standard JESD


    Original     		SN74GTL2006 13BIT SCES619 000-V A114-B, A115-A) 10AI1 10AI2 PDF

    SN74GTL2107PWRG4

    Abstract: A115-A C101 SN74GTL2107
    Text: SN74GTL2107 12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR www.ti.com SCLS699 – JULY 2006 FEATURES • • • • PW PACKAGE TOP VIEW Operates as a GTL–/GTL/GTL+ to LVTTL or LVTTL to GTL–/GTL/GTL+ Translator Series Termination on TTL Output of 30 Ω


    Original     		SN74GTL2107 12-BIT SCLS699 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2107PWRG4 A115-A C101 SN74GTL2107 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2007 12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCLS609 − MARCH 2005 D Operates as a GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing Done to JEDEC Standard


    Original     		SN74GTL2007 SCLS609 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2007 12-bit PDF

    Untitled

    Abstract: No abstract text available
    Text: GTL2107 12-bit GTL−/GTL/GTL+ to LVTTL translator Rev. 05 — 23 December 2009 Product data sheet 1. General description The GTL2107 is a customized translator between dual Xeon processors, GTL−/GTL/GTL+ I/O and the Platform Health Management, South Bridge and Power Supply 3.3 V LVTTL


    Original     		GTL2107 12-bit GTL2107 JESD22-A114, JESD22-A115, JESD22-C101 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2007 12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCLS609 − MARCH 2005 D Operates as a GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing Done to JEDEC Standard


    Original     		SN74GTL2007 12BIT SCLS609 000-V A114-B, A115-A) 10AI1 10AI2 PDF

    GTL2006

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS GTL2006 13-bit GTL/GTL+ to LVTTL translator Preliminary data Philips Semiconductors 2002 Nov 06 Philips Semiconductors Preliminary data 13-bit GTL/GTL+ to LVTTL translator GTL2006 FEATURES PIN CONFIGURATION • Operates as a GTL/GTL+ to LVTTL or LVTTL to to GTL/GTL+


    Original     		GTL2006 13-bit GTL2006 JESD22-A114, JESD22-A115 JESD22-C101 10AI1 10AI2 10BOI PDF

    GTL2006

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS GTL2006 13-bit GTL-/GTL/GTL+ to LVTTL translator Preliminary data Philips Semiconductors 2003 May 27 Philips Semiconductors Preliminary data 13-bit GTL-/GTL/GTL+ to LVTTL translator GTL2006 FEATURES PIN CONFIGURATION • Operates as a GTL-/GTL/GTL+ to LVTTL or LVTTL to to


    Original     		GTL2006 13-bit GTL2006 10AI1 10AI2 10BOI 10BO2 SW01091 JESD22-A114, PDF

    GTL2006

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS GTL2006 13-bit GTL-/GTL/GTL+ to LVTTL translator Product data Philips Semiconductors 2003 Dec 18 Philips Semiconductors Product data 13-bit GTL-/GTL/GTL+ to LVTTL translator GTL2006 FEATURES PIN CONFIGURATION • Operates as a GTL-/GTL/GTL+ to LVTTL sampling receiver or


    Original     		GTL2006 13-bit GTL2006 10BOI 10BO2 SW01091 JESD22-A114, JESD22-A115 JESD22-C101 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2107 12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR www.ti.com SCLS699 – JULY 2006 FEATURES • • • • PW PACKAGE TOP VIEW Operates as a GTL–/GTL/GTL+ to LVTTL or LVTTL to GTL–/GTL/GTL+ Translator Series Termination on TTL Output of 30 Ω


    Original     		SN74GTL2107 12-BIT SCLS699 000-V A114-B, A115-A) 10AI1 10AI2 10BO1 PDF

    A115-A

    Abstract: C101 SN74GTL2006
    Text: SN74GTL2006 13ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCES619 – DECEMBER 2004 D Operates as GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing to JEDEC Standard JESD


    Original     		SN74GTL2006 13BIT SCES619 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2006 A115-A C101 PDF

    10BOn

    Abstract: GTL2006 GTL2007 GTL2007PW JESD22-A114 JESD22-A115 JESD78 TSSOP28
    Text: GTL2007 13-bit GTL to LVTTL translator with power good control Rev. 01 — 2 June 2005 Product data sheet 1. General description The GTL2007 is a customized translator between dual Xeon processors, Platform Health Management, South Bridge and Power Supply LVTTL and GTL signals.


    Original     		GTL2007 13-bit GTL2007 GTL2006 10BOn GTL2007PW JESD22-A114 JESD22-A115 JESD78 TSSOP28 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2107 12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR www.ti.com SCLS699 – JULY 2006 FEATURES • • • • PW PACKAGE TOP VIEW Operates as a GTL–/GTL/GTL+ to LVTTL or LVTTL to GTL–/GTL/GTL+ Translator Series Termination on TTL Output of 30 Ω


    Original     		SN74GTL2107 12-BIT SCLS699 000-V A114-B, A115-A) 10AI1 10AI2 10BO1 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2007 12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCLS609 − MARCH 2005 PW PACKAGE TOP VIEW D Operates as a GTL-/GTL/GTL+ to LVTTL or D D D LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing Done to JEDEC Standard


    Original     		SN74GTL2007 SCLS609 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2007 12-bit PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2107 12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR www.ti.com SCLS699 – JULY 2006 FEATURES • • • • PW PACKAGE TOP VIEW Operates as a GTL–/GTL/GTL+ to LVTTL or LVTTL to GTL–/GTL/GTL+ Translator Series Termination on TTL Output of 30 Ω


    Original     		SN74GTL2107 12-BIT SCLS699 000-V A114-B, A115-A) 10AI1 10AI2 10BO1 PDF

    A115-A

    Abstract: C101 SN74GTL2006
    Text: SN74GTL2006 13ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCES619 – DECEMBER 2004 D Operates as GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing to JEDEC Standard JESD


    Original     		SN74GTL2006 13BIT SCES619 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2006 A115-A C101 PDF

    A115-A

    Abstract: C101 SN74GTL2107
    Text: SN74GTL2107 12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR www.ti.com SCLS699 – JULY 2006 FEATURES • • • • PW PACKAGE TOP VIEW Operates as a GTL–/GTL/GTL+ to LVTTL or LVTTL to GTL–/GTL/GTL+ Translator Series Termination on TTL Output of 30 Ω


    Original     		SN74GTL2107 12-BIT SCLS699 000-V A114-B, A115-A) 10AI1 10AI2 A115-A C101 SN74GTL2107 PDF

    GTL2107

    Abstract: GTL2107PW JESD22-A114 JESD22-A115 JESD78 TSSOP28
    Text: GTL2107 12-bit GTL−/GTL/GTL+ to LVTTL translator Rev. 05 — 23 December 2009 Product data sheet 1. General description The GTL2107 is a customized translator between dual Xeon processors, GTL−/GTL/GTL+ I/O and the Platform Health Management, South Bridge and Power Supply 3.3 V LVTTL


    Original     		GTL2107 12-bit GTL2107 JESD22-A114, JESD22-A115, JESD22-C101 JESD78 GTL2107PW JESD22-A114 JESD22-A115 TSSOP28 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2007 12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCLS609 − MARCH 2005 D Operates as a GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing Done to JEDEC Standard


    Original     		SN74GTL2007 12BIT SCLS609 000-V A114-B, A115-A) 10AI1 10AI2 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2107 12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR www.ti.com SCLS699 – JULY 2006 FEATURES • • • • PW PACKAGE TOP VIEW Operates as a GTL–/GTL/GTL+ to LVTTL or LVTTL to GTL–/GTL/GTL+ Translator Series Termination on TTL Output of 30 Ω


    Original     		SN74GTL2107 12-BIT SCLS699 000-V A114-B, A115-A) 10AI1 10AI2 PDF

    GTL2006

    Abstract: JESD22-A114 JESD22-A115 7BON
    Text: INTEGRATED CIRCUITS GTL2006 13-bit GTL–/GTL/GTL+ to LVTTL translator Product data Supersedes data of 2003 Dec 18 Philips Semiconductors 2004 Jun 21 Philips Semiconductors Product data 13-bit GTL–/GTL/GTL+ to LVTTL translator FEATURES GTL2006 PIN CONFIGURATION


    Original     		GTL2006 13-bit 10AI1 10BOI 10AI2 10BO2 GTL2006 JESD22-A114 JESD22-A115 7BON PDF

    A115-A

    Abstract: C101 SN74GTL2006
    Text: SN74GTL2006 13ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCES619 – DECEMBER 2004 D Operates as GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing to JEDEC Standard JESD


    Original     		SN74GTL2006 13BIT SCES619 000-V A114-B, A115-A) 10AI1 10AI2 SN74GTL2006 A115-A C101 PDF

    MCM6227B

    Abstract: MCM8A10 Nippon capacitors
    Text: — MOTOROLA SEMICONDUCTOR TECHNICAL I — – Order this document by MCM8A10~ DATA Advance Information I I MCM8A1 o lMx8 Bit Fast Static RAM Module “The MCM8A1 O is an 8M bit static random access memo~ module organized as 1,048,576 words of 8 bits. The module is offered in a 72–lead single in-line


    Original     		MCM8A10~ MCM6227B 28-lead Colorado80217. 14W1-2Q7 602-2MW9 MCM8A10 Nippon capacitors PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74GTL2007 12ĆBIT GTLĆ/GTL/GTL+ TO LVTTL TRANSLATOR SCLS609 − MARCH 2005 D Operates as a GTL-/GTL/GTL+ to LVTTL or D D D PW PACKAGE TOP VIEW LVTTL to GTL-/GTL/GTL+ Translator Series Termination on TTL Outputs of 30 W Latch-Up Testing Done to JEDEC Standard


    Original     		SN74GTL2007 12BIT SCLS609 000-V A114-B, A115-A) 10AI1 10AI2 PDF