manual PACE PSR 800 Plus
Abstract: manual PACE PSR 900 manual PACE PSR 900 Plus 970fx PowerPC 970FX 970FX 1.41 a2b 340 manual PACE PSR 800 Developing Embedded Software For The IBM PowerPC 970FX Processor X0410
Text: Title Page IBM PowerPC 970FX RISC Microprocessor User’s Manual Version 1.7 March 14, 2008 Copyright and Disclaimer Copyright International Business Machines Corporation 2003, 2008 All Rights Reserved Printed in the United States of America March 2008
|
Original
|
970FX
manual PACE PSR 800 Plus
manual PACE PSR 900
manual PACE PSR 900 Plus
PowerPC 970FX
970FX 1.41
a2b 340
manual PACE PSR 800
Developing Embedded Software For The IBM PowerPC 970FX Processor
X0410
|
PDF
|
SPARC64
Abstract: 180NM 400M GS21 sparc64 gp
Text: SPARC64 VII Fujitsu’s Next Generation Quad-Core Processor August 26, 2008 Takumi Maruyama LSI Development Division Next Generation Technical Computing Unit Fujitsu Limited All Rights Reserved,Copyright FUJITSU LIMITED 2008 Fujitsu Processor Development
|
Original
|
SPARC64TM
130nm
180nm
150nm
SPARC64
180nm
GS8800B
SPARC64
400M
GS21
sparc64 gp
|
PDF
|
CORE i3 ARCHITECTURE
Abstract: CORE i3 instruction set SPARC64 core i7 registers SPARC64TM 220nm Fujitsu SparC64 instruction set sparc64viiifx core i7 alu fujitsu GS21
Text: SPARC64 VIIIfx: Fujitsu’s New Generation Octo Core Processor for PETA Scale computing August 25, 2009 Takumi Maruyama LSI Development Division Next Generation Technical Computing Unit Fujitsu Limited All Rights Reserved,Copyright FUJITSU LIMITED 2009
|
Original
|
SPARC64TM
SPARC64TM
130nm
180nm
150nm
SPARC64
180nm
CORE i3 ARCHITECTURE
CORE i3 instruction set
SPARC64
core i7 registers
220nm
Fujitsu SparC64 instruction set
sparc64viiifx
core i7 alu
fujitsu GS21
|
PDF
|
GI 312 diode
Abstract: mm-100-xx mm-100-xxx BTS 308 8x 8 led dot matrix amd 15h power AMD 754 AMD xp datasheet AMD64 Architecture Programmer Athlon 64
Text: Software Optimization Guide for AMD Athlon 64 and AMD Opteron™ Processors Publication # 25112 Revision: 3.03 Issue Date: September 2003 2001 – 2003 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices,
|
Original
|
|
PDF
|
Gigabyte 848p
Abstract: 82848P SRT 30130 848P 253575 MOTHERBOARD msi CIRCUIT diagram PC MOTHERBOARD CIRCUIT diagram gigabyte intel schematics
Text: Intel 848P Chipset Datasheet Intel® 82848P Memory Controller Hub MCH August 2003 Document Number: 253575-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
|
Original
|
82848P
TESTP10
TESTP11
Gigabyte 848p
SRT 30130
848P
253575
MOTHERBOARD msi CIRCUIT diagram
PC MOTHERBOARD CIRCUIT diagram gigabyte
intel schematics
|
PDF
|
tag l2
Abstract: PC2100 PC2700 X86-64 Northbridge L2 ecc x86 processor architecture Ht cpu support
Text: AMD’s Next Generation Microprocessor Architecture Fred Weber October 2001 "Hammer" Goals • Build a next-generation system architecture which serves as the foundation for future processor platforms • Enable a full line of server and workstation products
|
Original
|
32-bit)
64-bit
x86-64
x86-64TM
tag l2
PC2100
PC2700
Northbridge
L2 ecc
x86 processor architecture
Ht cpu support
|
PDF
|
microprocessor 8212
Abstract: 970MP PowerPC 970MP kj 8445 TAG 8446 manual PACE PSR 800 Plus PowerPC Microprocessor Family Programming manual PACE PSR 900 x0227 manual PACE PSR 900 Plus
Text: Title Page IBM PowerPC 970MP RISC Microprocessor User’s Manual Version 2.3 March 7, 2008 Copyright and Disclaimer Copyright International Business Machines Corporation 2005, 2008 All Rights Reserved Printed in the United States of America March 2008
|
Original
|
970MP
microprocessor 8212
PowerPC 970MP
kj 8445
TAG 8446
manual PACE PSR 800 Plus
PowerPC Microprocessor Family Programming
manual PACE PSR 900
x0227
manual PACE PSR 900 Plus
|
PDF
|
Untitled
Abstract: No abstract text available
Text: /T L in C A B TECHNOLOGY F€RTUR€S _ LTC1164-6 L o w P o w e r 8th O rd e r Pin S e le c t a b le E lliptic or Lin e a r P h a s e L o w p a ss Filter DCSCRIPTIOn • 8th Order Pin Selectable Elliptic or Bessel Filter in a The LTC1164-6 is a monolithic 8th order elliptic lowpass
|
OCR Scan
|
LTC1164-6
LTC1164-6
14-Pin
30kHz
14-Lead
16-Lead
10ENT,
|
PDF
|
ic la 1260
Abstract: No abstract text available
Text: Customer Information Shee □RAWING No.: Q0XXX-XX SHEET 2 OF 2 IF IN DOUBT - ASK NOT TO SCALE m ANGLE PROJECTION j ALL DIMENSIONS IN : ©©©©©©©! •12.95 - S T Y L E 'i' Ì L b fiO O O e O O ! i©"00©©©©0©i S T Y LE '2' i CL¿ I© ©©©©©©© ©i
|
OCR Scan
|
UL94V-0,
10ENTIAL.
01msn
ic la 1260
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MN ETC-8 EmbeddedTestController The Micro Networks ETC-8 is an Embed Features: ded Test Controller designed for applica • Environmentally Rugged tion in diverse electronic and electrome chanical systems. The device and its real 9 TimeTag and Datalog
|
OCR Scan
|
MC68HC11F1
860irax
|
PDF
|
Untitled
Abstract: No abstract text available
Text: N a tio n a l March 1996 Sem iconductor DM74ALS574A Octal D-Type Edge-Triggered Flip-Flop with TRI-STATE Outputs General Description These 8-bit registers feature totem-pole TRI-STATE outputs designed specifically for driving highiy-capacitive or relative
|
OCR Scan
|
DM74ALS574A
ALS574A
|
PDF
|
Untitled
Abstract: No abstract text available
Text: N _ , S e m i c o n d u c t o r a t i o n a l January 1992 MM54HC74A/MM74HC74A Dual D Flip-Flop with Preset and Clear General Description The 54HC/74HC logic family is functionally and pinout com patible with the standard 54LS/74LS logic family. All inputs
|
OCR Scan
|
MM54HC74A/MM74HC74A
MM54HC74A/MM74HC74A
|
PDF
|
3 bit ripple counter
Abstract: 7493 counter chip ar 0330
Text: MM58167B EHNational mm S em iconductor MM58167B Microprocessor Real Time Clock General Description The MM58167B is a low threshold metal gate CMOS circuit that functions as a real time clock in bus oriented microproc essor systems. The device includes an addressable real
|
OCR Scan
|
MM58167B
MM58167B
38-3S
3 bit ripple counter
7493 counter chip
ar 0330
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Philips Semiconductors Preliminary specification 16-bit buffer/line driver; 3-State 74LVCH16541A FEATURES PIN CONFIGURATION • 5 volt tolerant inputs/outputs for interfacing with 5V togic • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A
|
OCR Scan
|
16-bit
74LVCH16541A
74LVCH16541A
74LVC
|
PDF
|
|
|
E52283
Abstract: No abstract text available
Text: REV DATE DESCRIPTION SCO 100 112/93112741 RELEASED ! gr I CK m . •3/8 STUD K J e u J K K J L O ^ ^ *ir 0 Ì.Q&f P/N CONN TYPE 64011 64011R STUD 3. MATERIALS; BASE- PHENOLIC HARDWARE TIN PLATED COPPER ALLOY 2. REJECTION NOT SHOWN. 1. ADD R FOR REJECTION.
|
OCR Scan
|
LR32169
64011R
E52283
64011R
X/Ml/93
0THDW18C
00V-400A
05B0470
|
PDF
|
MC88200
Abstract: MC88100
Text: MOTOROLA Order this document by MC88200/D SEMICONDUCTOR TECHNICAL DATA MC88200 Technical Summary 16-Kbyte Cache/Memory Management Unit CM M U The MC88200 CMMU is a high-performance, HCMOS VLSI device providing zero-wait-state memory management and data caching. The memory management unit (MMU) efficiently supports a demand-paged
|
OCR Scan
|
MC88200/D
MC88200
16-Kbyte
MC88200
56-entry,
MC88100
|
PDF
|
Untitled
Abstract: No abstract text available
Text: R E V IS IO N S o E L E C T R IC A L N o m in a l. I m p e d a n c e F requ en cy VaLt R ange R a tin g « S ea V5W R V R M S L evel DC 1 2 .4 In s e r t io n RF D ie le c tr ic 1 2 .4 G H z - (d B (d B M IN I F ig 1 .0 6 + .0 0 5 flG H z M AX) M IN ) Ft
|
OCR Scan
|
10ENT
|
PDF
|
deltabond 152
Abstract: deltabond
Text: REUc, vED M Ar 3 1995 DOnJMc NOTES: 1. DISSIPATION FACTOR: .0 0 5 MAX @ 25* C, 1 kHZ. 2 . CAPACITANCE: 45 n F - 5 5 nF. 3. DIELECTRIC WITHSTANDING VOLTAGE: 1.5 kV RATED, 2 .2 5 kV PROCESS FOR 2 HOURS @ 100* C AND 3 kV PROOF FOR 5 SECS. 4. GRIT BLAST FINISH, NO TAPE OVERWRAP.
|
OCR Scan
|
7W970
1500WVDC
QQW343)
10ENT
deltabond 152
deltabond
|
PDF
|
96LS488
Abstract: CYB-002
Text: INTELLIGENT POSITIONING STEPPER MOTOR CONTROLLER 3F:CY512MAN.008 1 JUNE 83 ktm PRINTED IN U.S.A Cybernetic Micro Systems software products are copyrighted by and shall remain the property of Cybernetic Micro Systems, Inc. Duplication is subject to a license from Cybernetics. Cybernetic
|
OCR Scan
|
CY512MAN
CY250
CYB-002
CY512
CY250.
96LS488
|
PDF
|
MC88100
Abstract: MC88200 ctp21 CTP01 MC88204
Text: 4. 1 U * ÌÌ MOTOROLA Order this document by MC88204/D • SEMICONDUCTOR TECHNICAL DATA Technical Sum m ary 64K-Byte Cache/Memory Management Unit CMMU The MC88204 CMMU is a high-performance, HCMOS VLSI device providing zero-wait-state memory management and data caching. The m emory management unit (MMU) efficiently
|
OCR Scan
|
MC88204/D
64K-Byte
MC88204
56-entry,
MK145BP
A26875
MC88100
MC88200
ctp21
CTP01
|
PDF
|
RM73B2B
Abstract: eta trw bead murata RM73B2BT102J VJ21 HLMP3301-010 HLMP3502 RM73B3A qi 20pin HFBR-5205
Text: I TEXAS INSTRUMENTS Semiconductor Group TNETA1561/TNETA1500 PCI Reference Schematic Notebook Physical Interface SONET 155-Mbit/s, Multimode Fiber Connector SD N V007 July 12,1995 Questions should be directed to: TNETA TECHNICAL SUPPORT LINE *4atm@.ti.com
|
OCR Scan
|
TNETA1561/TNETA1500
155-Mbit/s,
SDNV007
TNETA1561
TNETA1500
TNETA1561
SDNS01
9E668
RM73B2B
eta trw
bead murata
RM73B2BT102J
VJ21
HLMP3301-010
HLMP3502
RM73B3A
qi 20pin
HFBR-5205
|
PDF
|
LM709
Abstract: LM703 ML1015 LM709H ML-1015
Text: February 1995 Semicondu d o r LM709 Operational Amplifier General Description The LM709 series is a monolithic operational amplifier in tended for general-purpose applications. Operation is com pletely specified over the range of voltages commonly used
|
OCR Scan
|
LM709
LM703
ML1015
LM709H
ML-1015
|
PDF
|
xc88200
Abstract: SADFL MC88200 TS832
Text: O THOMSON COMPOSANTS MILITAIRES ET SPATIAUX TS88200 16-KILOBYTE CACHE/MEMORY MANAGEMENT UNIT CMMU DESCR IPTIO N The TS88200 CMMU is a high-performance, HCMOS VLSI device providing zero-wait-state memory ma nagem ent and data caching. The MMU (memory management unit) e ffic ie n tly supports a demandpaged virtual memory environment with two logical
|
OCR Scan
|
TS88200
16-KILOBYTE
TS88200
56-entry,
TD2bfl72
00D3536
XC88200
MC88200
BR589/0
SADFL
TS832
|
PDF
|
Untitled
Abstract: No abstract text available
Text: in te i, 82078 64 PIN CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER • Small Footprint and Low Height Packages — Selectable Boot Drive — Standard IBM and ISO Format Features — Format with Write Command for High Performance in Mass Floppy Duplication ■ Supports Standard 5.0V as well as Low
|
OCR Scan
|
2L17S
|
PDF
|
