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    Abstract: No abstract text available
    Text: PEEL 18LV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • ■ Low Voltage, Ultra Low Power Operation Architectural Flexibility - - Vcc = 2.7 to 3.6 V Icc =5 |jA typical at standby Icc = 1.5 mA (typical) at 1 MHz Meets JEDEC LV Interface Spec (JESD8-A)


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    PDF 18LV8Z-25 113kii EEL18LV8ZP-25 PEEL18LV8ZJ-25 PEEL18LV8ZS-25 PEEL18LV8ZT-25 20-pin