K7A161801M

Abstract: K7A163601M advh
Contextual Info: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85

Contextual Info: 117MHz SAW Filter 10MHz Bandwidth China Electronics Technology Group Corporation No.26 Research Institute SIPAT Co., Ltd. N11703 Part Number:LB Number:LBN11703 www. sipatsaw.com Features � For IF SAW filter � High attenuation � Single-ended operation

junction temperature v850

Contextual Info: Preliminary - April 1998 ¡il T t d l N O L O C V 2.5V or 3.3V I/O 117/100/90/50 GS840NBT18FT F eatures Output registers are provided and are controlled by FT mode pin. With FT mode pin, output registers can be programmed in either pipeline mode for very high frequency operation (117MHz or

IDT71V632

Abstract: sram with address counter
Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

AS8C801825

Abstract: AS8C803625 256K x 8 SRAM dip
Contextual Info: 256K X 36, 512K X 18 3.3V Synchronous SRAMs 3.3V I/O, Burst Counter Flow-Through Outputs, Single Cycle Deselect AS8C803625 AS8C801825 Features • •       256K x 36, 512K x 18 memory configuration Supports fast access times: - 7.5ns up to 117MHz clock frequency

71V632

Abstract: IDT71V632
Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632 with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

Contextual Info: GSI TECHNOLOGY GS820V32Q/T 64K x 32 Burst GS820V32Q/T 4/5/6, 2.5V I/O, 2.0mA Features • Single 3.3V +5%/-5% power supply • Separate VDDQ to allow 2.375V to 3.465V output supply level • High frequency operation: 117MHz • Fast access time: 4.5ns Clock to Q

IDT71V632

Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632 with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

Contextual Info: PRELIMINARY SSRAM AS5SS128K32 128K x 32 4Mb Synchronous Flow-Through Static Ram FEATURES GENERAL DESCRIPTION • Available in Mil-Temp*, Enhanced & Industrial Ranges • Clock frequency up to 117MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write

IDT71V632

Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

GS811V

Abstract: IQE3045
Contextual Info: in T f ( 4 1 N 0 LOCI G S 811V 32Q /T GS811V32Q/T Q O tf v OO D u v e t* 80-117MHz(P/L) 2.5V_ O fcl\ X O C . DU I O I_ 66MHz(FT) Features • • • • • • • Single 3.3V +5%/-5% power supply Separate VDDQ to allow 2.375V to 3.465V output supply level

CD73

Contextual Info: Preliminary - February 98 CU l i tu H0LOCV 2.5V or 3.3V 64K x 64 Burst 117/100/83/75/66 Features • • • • • • • • • • • Single 3.3V +10%/-5% power supply 5-volt tolerant clock High frequency operation: 117MHz Fast access time: 4.5ns Clock to Q

A2305

Contextual Info: Preliminary - April 1998 id UdlHOLOGU 2.5V or 3.3V I/O 117/100/90/50 GS840NBT32FT F eatures Output registers are provided and are controlled by FT mode pin. With FT mode pin, output registers can be programmed in either pipeline mode for very high frequency operation (117MHz or

Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632 with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

Contextual Info: SSRAM PRELIMINARY AS5SS512K18 512K x 18 9Mb Synchronous Flow-Through Static Ram FEATURES • Available in Mil-Temp*, Enhanced* & Industrial Ranges • Clock frequency up to 117MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: KM736V990 KM718V090 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85

SSRAM

Abstract: AS5SS256K36
Contextual Info: SSRAM AS5SS256K36 256K x 36 SSRAM PIN ASSIGNMENT Top View Flow-Through, Synchronous Burst SRAM 100-pin TQFP (DQ) FEATURES             OPTIONS  MARKING Timing 7.5ns/8.5ns/117MHz 8.5ns/10ns/100MHz 10ns/15ns/66MHz -7.5

Contextual Info: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85

K7A161801M

Abstract: K7A163601M
Contextual Info: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85

DLS FT 031

Contextual Info: ¡il TÆC41H01DCV GS81Í32Q/T O O tf G S 81132Q /Í 3.3V_ O f c I V V X 00 J 4 Features • Single 3.3V +l0% /-5% power supply • High frequency operation: 117MHz • Fast access time: 4.5ns Clock to Q • FT mode pin for either flow-thru or pipeline operation

Contextual Info: 117MHz SAW Filter 1MHz Bandwidth China Electronics Technology Group Corporation No.26 Research Institute SIPAT Co., Ltd. Part Number: LBS11702 www.sipatsaw.com Features — For IF SAW filter — High attenuation — Single-ended operation — Dual In-line Package

IDT71V632

Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.

IDT71V632

Contextual Info: 64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V632/Z with full support of the Pentium and PowerPC™ processor interfaces. The pipelined burst architecture provides cost-effective 3-1-1-1 secondary cache performance for processors up to 117MHz.