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    12L6 Search Results

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    12L6 Price and Stock

    Susumu Co Ltd RG2012L-682-L-T05

    RES SMD 6.8KOHM 0.01% 1/10W 0805
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    DigiKey RG2012L-682-L-T05 Digi-Reel 2,008 1
    • 1 $3.51
    • 10 $2.909
    • 100 $1.8926
    • 1000 $1.8926
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    RG2012L-682-L-T05 Cut Tape 2,008 1
    • 1 $3.51
    • 10 $2.909
    • 100 $1.8926
    • 1000 $1.8926
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    RG2012L-682-L-T05 Reel 2,000 500
    • 1 -
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    • 1000 $1.82514
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    Mouser Electronics RG2012L-682-L-T05 968
    • 1 $3.51
    • 10 $2.73
    • 100 $1.77
    • 1000 $1.74
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    Molex 0502128000-12-L6

    12" PRE-CRIMP 3049 BL001 BLUE
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    DigiKey 0502128000-12-L6 Bulk 584 10
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    • 10 $0.639
    • 100 $0.5207
    • 1000 $0.42446
    • 10000 $0.36805
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    Hirose Electric Co Ltd H2BBG-10112-L6

    JUMPER-H1501TR/A3049L/H1501TR 12
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    DigiKey H2BBG-10112-L6 Bulk 354 10
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    • 10 $0.696
    • 100 $0.5671
    • 1000 $0.46234
    • 10000 $0.4009
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    Hirose Electric Co Ltd H4BBT-10112-L6

    JUMPER-H9992TR/1853BL/H9992TR12"
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    DigiKey H4BBT-10112-L6 Bulk 350 10
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    • 10 $0.641
    • 100 $0.5226
    • 1000 $0.426
    • 10000 $0.36939
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    Hirose Electric Co Ltd H3BXT-10112-L6

    JUMPER-H1504TR/A3049L/X 12"
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    DigiKey H3BXT-10112-L6 Bulk 259 10
    • 1 -
    • 10 $0.567
    • 100 $0.4618
    • 1000 $0.37646
    • 10000 $0.32643
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    Find more 12L6 price and stock on Findchips.com

    12L6 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    12L6-GT General Electric BEAM PENTODE FOR AF POWER AMPLIFIER APPLICATIONS Scan PDF

    12L6 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    25L6-GT

    Abstract: 50L6-GT 12L6-GT 25L6GT 50L6GT 12L6GT tube 12L6 50L6gt tube pentode 12L6
    Text: 25L6-GT 12L6-GT 5 0 L6 -G T 25L6-GT - 1 2L6-GT - 50 L6-GT BEAM PENTODE ggectffc* ET-T867 Page 1 For AF Pow er Amplifier A pplications TUBES 7-54 — = DESCRIPTION A N D RATING^ The 25L6-GT is a beam pentode designed for use in the audio-frequency power output stage of radio and television receivers. Features include high


    OCR Scan     		25L6-GT -12L6-GT 12L6-GT 50L6-GT ET-T867 12L6-GT, 25L6-GT, 50L6-GT 12L6-GT 25L6GT 50L6GT 12L6GT tube 12L6 50L6gt tube pentode 12L6 PDF

    Untitled

    Abstract: No abstract text available
    Text: TICPAL18V8-30M, TICPAL18V8 25C ADVANCED EPICm CMOS GENERIC M i D 3 0 8 7 . DECEMBER 1 9 8 7 • 20-Pin Advanced C M OS Generic PAL •


    OCR Scan     		TICPAL18V8-30M, TICPAL18V8 20-Pin 25-ns PDF

    16V8

    Abstract: GAL16LV8 GAL16LV8C GAL16LV8C-10LJ GAL16LV8C-15LJ GAL16LV8C-7LJ GAL16LV8D GAL16LV8D-3LJ GAL16LV8D-5LJ
    Text: ree Lead-Fage P a c k ns Optio le! b Availa Features GAL16LV8 Low Voltage E2CMOS PLD Generic Array Logic Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.5 ns Maximum Propagation Delay — Fmax = 250 MHz — 2.5 ns Maximum from Clock Input to Data Output


    Original     		GAL16LV8 GAL16LV8C) 16V8 GAL16LV8 GAL16LV8C GAL16LV8C-10LJ GAL16LV8C-15LJ GAL16LV8C-7LJ GAL16LV8D GAL16LV8D-3LJ GAL16LV8D-5LJ PDF

    C57401AJ

    Abstract: C57401J/883B M38510 numbering C57402AJ AMD - C57401J MMI PAL14L8 5962-8779105EX 53RA1681 C57401L
    Text: M ilitary Specialty Memory Whatever your military data buffering needs, Advanced Micro Devices has the right specialty memory device to fit your applica­ tion. All of our military bipolar and CMOS First-in First-out FIFO memories are fully screened to MIL-STD-883.


    OCR Scan     		MIL-STD-883. 57C401 57C402 57C4013 57C4023 20-Lead 24-Lead 20-Terminal 28-Terminal C57401AJ C57401J/883B M38510 numbering C57402AJ AMD - C57401J MMI PAL14L8 5962-8779105EX 53RA1681 C57401L PDF

    AM 16v8

    Abstract: palce16v8 programming algorithm PALCE erase AMD PALCE PALCE Programmer palce programming algorithm
    Text: F IN A L COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 PALCE16V8 Family AdvaM n,“ o EE CMOS 20-Pin Universal Programmable Array Logic Devices DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all 20-pin GAL devices ■ Programmable output polarity


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 PALCE16V8 20-Pin PAL16R8 PAL10H8 AM 16v8 palce16v8 programming algorithm PALCE erase AMD PALCE PALCE Programmer palce programming algorithm PDF

    palce16V8 programming

    Abstract: AMD palce16v8 programming palce16v8h20 PALCE16V8Q-25PC palce16v8 programming guide
    Text: _ COM’L: H-10/15/25, Q-15/25 MIL: H-20/25 Cl Advanced Micro Devices PALCE16V8 EE CMOS 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all 20-pln GAL devices ■ Electrically erasable CMOS technology


    OCR Scan     		H-10/15/25, Q-15/25 H-20/25 PALCE16V8 20-Pin 20-pln PAL16R8 PAL10H8 palce16V8 programming AMD palce16v8 programming palce16v8h20 PALCE16V8Q-25PC palce16v8 programming guide PDF

    14L4

    Abstract: 10l8 12L6 12H6 16c1 4511 logic diagram 1117 L schematic diagram PAL14L pin shourd PAL10H8
    Text: ADV MICRO PLA/PL E/ ARR AY S =ib U2 b7526 ADV MICRO P L A / P L E / ARRAYS D E | 055755b 0057114 7 96D 27114 D T-V6-/3-V7 Combinatorial PALI 0H8 Series 1 0 H 8 , 1 2 H 6 , 1 4 H 4 , 1 6 H 2 1 6 C 1 1 0 L 8 , 1 2 L 6 , 1 4 L 4 - , 1 6 L 2 Ordering Information


    OCR Scan     		055755b U2b7526 PAL10H8 2t2t303f T-46-13-47 025752b 14H4j 14L4 10l8 12L6 12H6 16c1 4511 logic diagram 1117 L schematic diagram PAL14L pin shourd PDF

    Untitled

    Abstract: No abstract text available
    Text: Commercial INC. PEEL 16V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features • Compatible with Popular 16V8 Devices — 16V8 socket and function compatible — Programs with standard 16V8 JEDEC file — 20-pin DIP, SOIC, and PLCC packages


    OCR Scan     		20-pin plastiPEEL16V8JQ-15 PEEL16V8SL-15 PEEL16V8SQ-15 PEEL16V8PL-25 PEEL16V8PQ-25 PEEL16V8JL-25 PEEL16V8JQ-25 PEEL16V8SL-25 PEEL16V8SQ-25 PDF

    GAL16VB

    Abstract: National SEMICONDUCTOR GAL16V8 GAL16V8 application notes GAL16v8 algorithm
    Text: GAL16V8 National Semiconductor GAL16V8 Generic Array Logic General Description Features The NSC E2CMOS GAL device combines a high per­ formance CMOS process with electrically erasable floating gate technology. This programmable memory technology applied to array logic provides designers with reconfigurable


    OCR Scan     		GAL16V8 GAL16V8 ns-35 emula/9344-36 TL/L/9344-19 GAL16VB National SEMICONDUCTOR GAL16V8 GAL16V8 application notes GAL16v8 algorithm PDF

    16v8h

    Abstract: 16V8Q palce16v8 programming algorithm 16v8z PAL16C1 PAL16R8 PALCE16V8 PALCE16V8Z 16V8H-10 16v8z-25
    Text: PALCE16V8 PALCE16V8Z COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/25, Q-20/25 COM’L:-25 IND:-12/15/25 PALCE16V8 and PALCE16V8Z Families EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all 20-pin PAL devices


    Original     		PALCE16V8 PALCE16V8Z H-5/7/10/15/25, Q-10/15/25 H-10/25, Q-20/25 PALCE16V8 PALCE16V8Z 20-Pin 16v8h 16V8Q palce16v8 programming algorithm 16v8z PAL16C1 PAL16R8 16V8H-10 16v8z-25 PDF

    Untitled

    Abstract: No abstract text available
    Text: AT18V8Z Features • 20-pin Universal EPLD • Virtually Zero Standby Power • Functional Replacement for Common 20-Pin Programmable Devices Io l = 24 mA • High Performance CMOS EPROM Cell Technology Erasable Reconfigurable 100% Testable • 25 ns and 35 ns Max Propagation Delay Commercial


    OCR Scan     		AT18V8Z 20-pin 300-mil-wlde AT18V8Z-25DC AT18V8Z-25JC AT18V8Z-25PC 20DW3 AT18V8Z-30DI AT18V8Z-30JI PDF

    hy18cv8s

    Abstract: low cost eeprom programmer circuit diagram altera EP300 Altera ep310 EP300 HYUNDAI i10 10L8 16H8 HY18CV8 R1-48-*-F
    Text: AL HY18CV8 HYUNDAI SEMICONDUCTOR CMOS EEPLD DESCRIPTION FEATURES T he H Y 18CV8 is a CM O S E lectrically E ra sa­ ble P rogram m able Logic Device E E P L D th at provides a high perform ance; low power, re­ program m able and architecturally flexible alter­


    OCR Scan     		HY18CV8 Y18CV8 HY18CV8 20pin hy18cv8s low cost eeprom programmer circuit diagram altera EP300 Altera ep310 EP300 HYUNDAI i10 10L8 16H8 R1-48-*-F PDF

    Untitled

    Abstract: No abstract text available
    Text: COM’L: -25 IND: -25 a P A L C E 1 6 V 8 Z -2 5 Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic_ DISTINCTIVE CHARACTERISTICS Advanced Micro Devices • Outputs programmable as registered or combinatorial in any combination ■ Programmable output polarity


    OCR Scan     		20-Pin PAL16R8tact PALCE16V8Z-25 135th D-8994 PDF

    7486 XOR GATE

    Abstract: circuit diagram of half adder using IC 7486 7486 2-input xor gate ic 7486 XOR GATE pin configuration IC 7486 pin configuration of 7486 IC vhdl code for vending machine pin DIAGRAM OF IC 7486 data sheet IC 7408 laf 0001
    Text: Lattice Semiconductor Handbook 1994 Click on one of the following choices: • Table of Contents • How to Use This Handbook • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. Lattice Semiconductor Handbook 1994 i Copyright © 1994 Lattice Semiconductor Corporation.


    Original     		PDF

    16LB

    Abstract: No abstract text available
    Text: Devices 20-Pin 16H2/-2 16C1/-2 16L2/-2 16L8/B/B-2/B-4 A/A-2/A-4 bjl=jl£jl£jl=jl£jl=jyi=iy 14H4/-2 12H6/-2 10H8/-2 E E E - AND LOGIC ARRAY E =£> = 0 Ed e = t> =T> i > ID E H > ID E =0 - - AND LOGIC - ARRAY - - n > ID E E 10L8/-2 E E E E - AND - I H > ID


    OCR Scan     		20-Pin 10H8/-2 12H6/-2 14H4/-2 16H2/-2 16C1/-2 16L8/B/B-2/B-4 10L8/-2 12L6/-2 14L4/-2 16LB PDF

    GAL16V8

    Abstract: IC gal16v8 gal16v8b-10lj 16v8b GAL programmer schematic gal16v8 programming 16V8 GAL16V8B-7LJ GAL16V8B-7LP GAL16V8C
    Text: Specifications GAL16V8 GAL16V8 High Performance E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • HIGH PERFORMANCE E CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay — Fmax = 166 MHz — 4 ns Maximum from Clock Input to Data Output


    Original     		GAL16V8 GAL16V8 IC gal16v8 gal16v8b-10lj 16v8b GAL programmer schematic gal16v8 programming 16V8 GAL16V8B-7LJ GAL16V8B-7LP GAL16V8C PDF

    Untitled

    Abstract: No abstract text available
    Text: Devices 20-P in 14H4/-2 12H6/-2 10H8/-2 16H2/-2 16C1/-2 16L2/-2 16L8/B/B-2/B-4 A/A-2/A-4 - AND LOGIC ARRAY E - E =£> = 0 Ed = t> =T> i > ID H > ID =0 n > ID e E E - - - AND - ARRAY - E - I H > ID ID =E> =E> 3 ID =E> 3 =E> 3 = T > ID 3 "I EE EEEE EE EE r t


    OCR Scan     		20-Pin 10H8/-2 12H6/-2 14H4/-2 16H2/-2 16C1/-2 16L8/B/B-2/B-4 10L8/-2 12L6/-2 14L4/-2 PDF

    16L8-25

    Abstract: No abstract text available
    Text: Devices 20-Pin 14H4/-2 12H6/-2 10H8/-2 16H2/-2 16C1/-2 16L2/-2 16L8/B/B-2/B-4 A/A-2/A-4 - AND LOGIC ARRAY E - E =£> = 0 Ed = t> =T> i > ID H > ID =0 n > ID e E E - - - AND - ARRAY - E - I H > ID ID =E> =E> 3 ID =E> 3 =E> 3 = T > ID 3 "I EE EEEE EE EE r t


    OCR Scan     		20-Pin 10H8/-2 12H6/-2 14H4/-2 16H2/-2 16C1/-2 16L8/B/B-2/B-4 10L8/-2 12L6/-2 14L4/-2 16L8-25 PDF

    16l8

    Abstract: 16x4
    Text: Devices 20-Pin E E- =£> = 0 Ed e =L> = t> AND = T > AND = E > LOGIC LOGIC ARRAY i > ID E - ARRAY = £ > E H > ID E =E> - =0 - - n > ID E E 10L8/-2 H > I ID ID =E> - AND = E > 3 - ARRAY ID =E> 3 E =E> 3 = T > ID "I 3 EE EErr> AND E - LOGIC = E > ARRAY E = [>


    OCR Scan     		20-Pin 10H8/-2 12H6/-2 14H4/-2 16H2/-2 16C1/-2 16L8/B/B-2/B-4 10L8/-2 12L6/-2 14L4/-2 16l8 16x4 PDF

    Untitled

    Abstract: No abstract text available
    Text: Devices 20-Pin 14H4/-2 12H6/-2 10H8/-2 16H2/-2 16C1/-2 16L2/-2 16L8/B/B-2/B-4 A/A-2/A-4 - AND LOGIC ARRAY E - E =£> = 0 Ed = t> =T> i > ID H > ID =0 n > ID e E E - - - AND - ARRAY - E - I H > ID ID =E> =E> 3 ID =E> 3 =E> 3 = T > ID 3 "I EE EEEE EE EE r t


    OCR Scan     		20-Pin 10H8/-2 12H6/-2 14H4/-2 16H2/-2 16C1/-2 16L8/B/B-2/B-4 10L8/-2 12L6/-2 14L4/-2 PDF

    EP320

    Abstract: altera ep320 EP320-2 program altera ep320 EP320I RAL16L8 EP3201 PAL16LB Eprom, altera, ep320 cx 1213 circuit diagram
    Text: § /à\^ 8 M ACR O CELL EPLD EP320 FEATURES GENERAL DESCRIPTION • User-Configurable replacement for TTL, 74HC and 20 pin PAL Family. The Altera EP320 Erasable Programmable Logic Device may be used as a replacement for T TL and 74HC. It also provides a high speed, low power “plug


    OCR Scan     		10/jA EP320. EP320 altera ep320 EP320-2 program altera ep320 EP320I RAL16L8 EP3201 PAL16LB Eprom, altera, ep320 cx 1213 circuit diagram PDF

    palce16v8 programming algorithm

    Abstract: AMD palce16v8 programming palce16v8 programming guide palce16v8z pal16r8 programming algorithm APL DOC SIC jmd PROGRAMMER PAL16R8 algorithm amd palce programming Guide palce16v6
    Text: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 a MIL: H-15/20/25 Advanced Micro Devices PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all 20-pin GAL devices


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 H-15/20/25 PALCE16V8 20-Pin PAL16R8 PAL10H8 palce16v8 programming algorithm AMD palce16v8 programming palce16v8 programming guide palce16v8z pal16r8 programming algorithm APL DOC SIC jmd PROGRAMMER PAL16R8 algorithm amd palce programming Guide palce16v6 PDF

    PLDC18G8

    Abstract: T1216 416rp Cypress 12h6 16v8 programming 15WC
    Text: PLDC18G8 CYPRESS SEMICONDUCTOR CMOS Generic 20-Pin Programmable Logic Device • Generic architecture to replace >tandard logic functions including; 10H8, 1 2 H 6 ,1 4 H 4 ,1 6 H 2 ,1 0 L 8 ,1 2 U , 14L4, 1 6 L 2 ,1 0 P 8 ,1 2 P 6,14P 4,1«P 2,16H 8, 16L 8,16P 8,16R 8,16R 6,16R 4,16R P 8,


    OCR Scan     		PLDC18G8 20-Pin --15WC 8--15WI 8--15KMB 15QMB 15WMB 8--20WI 8--20D 8--20KMB PLDC18G8 T1216 416rp Cypress 12h6 16v8 programming 15WC PDF

    P320S

    Abstract: F16V8BQ 16v8b pld program 16R8
    Text: Features * Industry Standard Architecture - Emulates Many 20-pin PALs - Low-cost Easy-to-use Software Tools * High-speed Electrically-erasable Programmable Logic Devices - 7.5 ns Maximum Pin-to-pin Delay * Several Power Saving Options Device lcc, Standby


    OCR Scan     		20-pin ATF16V8B ATF16V8BQ ATF16V8BQL 0364G -04/99/X P320S F16V8BQ 16v8b pld program 16R8 PDF