Untitled
Abstract: No abstract text available
Text: Product Preview GS832218 B/E /GS832236(B/E)/GS832272(C) 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp Features Flow Through/Pipeline Reads • FT pin for user-configurable flow through or pipeline operation
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Original
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GS832218
/GS832236
/GS832272
209-Pin
133MHz
x18/x36
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8322Z18 B/E /GS8322Z36(B/E)/GS8322Z72(C) 119, 165 & 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and
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Original
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GS8322Z18
/GS8322Z36
/GS8322Z72
119table
8322Z18
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PDF
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Untitled
Abstract: No abstract text available
Text: GS88218/36CB/D-333/300/250/200/150 119- and 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation
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Original
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GS88218/36CB/D-333/300/250/200/150
165-Bump
x18/x36
88218C
119-BGA
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS81302S08/09/18/36E-333/300/250/200/167 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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GS81302S08/09/18/36E-333/300/250/200/167
165-Bump
165-bump,
144Mb
GS81302Sx36E-300T.
81302Sxx
165-BGA
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PDF
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Untitled
Abstract: No abstract text available
Text: GS88218/36CB/D-xxxI 119- and 165-Bump BGA Industrial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation • Single/Dual Cycle Deselect selectable
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Original
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GS88218/36CB/D-xxxI
165-Bump
x18/x36
88218C
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1484V25 CY7C1485V25 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation
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Original
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CY7C1484V25
CY7C1485V25
72-Mbit
36/4M
250-MHz
200-MHz
167-MHz
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PDF
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165BGA
Abstract: No abstract text available
Text: CY7C1484V25 CY7C1485V25 PRELIMINARY 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation
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Original
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CY7C1484V25
CY7C1485V25
72-Mbit
36/4M
250-MHz
200-MHz
167-MHz
165FBGA
119-BGA
225-MHz
165BGA
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8644Z18E/GS8644Z36E 165-Pin BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the
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Original
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GS8644Z18E/GS8644Z36E
165-Pin
133MHz
8644Zxx
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PDF
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Untitled
Abstract: No abstract text available
Text: GS81302S08/09/18/36E-375/350/333/300/250 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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GS81302S08/09/18/36E-375/350/333/300/250
144Mb
165-Bump
165-BGA
81302Sxx
|
PDF
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GS88218CB-250
Abstract: GS88236CD-200I GS88236CD
Text: GS88218/36CB/D-333/300/250/200/150 119- and 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation
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Original
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GS88218/36CB/D-333/300/250/200/150
165-Bump
x18/x36
88218C
119-BGA
165-BGA
GS88218CB-250
GS88236CD-200I
GS88236CD
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PDF
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GS8322Z18
Abstract: GS8322Z72 d 209 l
Text: GS8322Z18 B/E /GS8322Z36(B/E)/GS8322Z72(C) 119, 165 & 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and
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Original
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GS8322Z18
/GS8322Z36
/GS8322Z72
8322Z18
GS8322Z72
d 209 l
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PDF
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Untitled
Abstract: No abstract text available
Text: GS88218/36CB/D-xxx 119- and 165-Bump BGA Commercial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation • Single/Dual Cycle Deselect selectable
|
Original
|
GS88218/36CB/D-xxx
165-Bump
x18/x36
88218C
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS81302S08/09/18/36E-375/350/333/300/250 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
|
GS81302S08/09/18/36E-375/350/333/300/250
165-Bump
165-bump,
144Mb
81302Sxx
165-BGA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS832218 B/E /GS832236(B/E)/GS832272(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Flow Through/Pipeline Reads
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Original
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GS832218
/GS832236
/GS832272
209-Pin
x18/x36
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PDF
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|
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112-011A
Abstract: No abstract text available
Text: GS8662Q08/09/18/36E-278/250/200/167 165-Bump BGA Commercial Temp Industrial Temp 278 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 72Mb SigmaQuad-II Burst of 2 SRAM Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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GS8662Q08/09/18/36E-278/250/200/167
165-Bump
144Mb
165-bump,
165-BGA
112-011A
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS832218 B/E /GS832236(B/E)/GS832272(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Flow Through/Pipeline Reads
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Original
|
GS832218
/GS832236
/GS832272
209-Pin
x18/x36
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8322Z18 B/E /GS8322Z36(B/E)/GS8322Z72(C) 119, 165 & 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and
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Original
|
GS8322Z18
/GS8322Z36
/GS8322Z72
119ble
8322Z18
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PDF
|
GS832218
Abstract: GS832218B-200 GS832218B-225 GS832218B-250 GS832272
Text: Preliminary GS832218 B/E /GS832236(B/E)/GS832272(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Flow Through/Pipeline Reads
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Original
|
GS832218
/GS832236
/GS832272
209-Pin
GS832218B-200
GS832218B-225
GS832218B-250
GS832272
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS88218/36CB/D-333/300/250/200/150 119- and 165-Bump BGA Commercial Temp Industrial Temp Features • • • • • • • • • • • • • • • 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
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Original
|
GS88218/36CB/D-333/300/250/200/150
165-Bump
88218C
119-BGA
165-BGA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CY7C1484V33 CY7C1485V33 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation
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Original
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CY7C1484V33
CY7C1485V33
72-Mbit
36/4M
250-MHz
CY7C1484V33,
CY7C1485V33
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PDF
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j123
Abstract: No abstract text available
Text: ORCA ORSPI4 Evaluation Board User’s Guide July 2004 ebug06_01 ORCA ORSPI4 Evaluation Board User’s Guide Lattice Semiconductor Introduction This user’s guide describes the Lattice evaluation board for the ORSPI4 device, a stand-alone evaluation PCB that
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Original
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ebug06
E5379A
16-bit
165-BGA
1-800-LATTICE
j123
|
PDF
|
AN1064
Abstract: CY7C1484V33 CY7C1485V33
Text: CY7C1484V33 CY7C1485V33 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz
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Original
|
CY7C1484V33
CY7C1485V33
72-Mbit
36/4M
CY7C1484V33/CY7C1485V33
AN1064
CY7C1484V33
CY7C1485V33
|
PDF
|
AN1064
Abstract: CY7C1484V25 CY7C1485V25
Text: CY7C1484V25 CY7C1485V25 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz
|
Original
|
CY7C1484V25
CY7C1485V25
72-Mbit
36/4M
250-MHz
AN1064
CY7C1484V25
CY7C1485V25
|
PDF
|
CY7C1444AV25
Abstract: CY7C1445AV25
Text: CY7C1444AV25 CY7C1445AV25 PRELIMINARY 36-Mbit 1M x 36/2M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation
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Original
|
CY7C1444AV25
CY7C1445AV25
36-Mbit
36/2M
250-MHz
CY7C1444AV25/CY7C1445AV25
100-Pin
CY7C1444AV25
CY7C1445AV25
|
PDF
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