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    Untitled

    Abstract: No abstract text available
    Text: HY5117400A Series ••HYUNDAI 4M x 4-bit CMOS DRAM DESCRIPTION me HY5117400A is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit. "Hie HY5117400A utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide


    OCR Scan     		PDF HY5117400A HY5117400A 1AD27-10-MAY94 HY5117400AJ HY5117400ASLJ HY5117400AT HY5117400ASLT

    ADC1001

    Abstract: ADC0801 ADC1001CCJ ADC1001CCJ-1 J20A LM336 NSC800 10 Bit Shift Register
    Text: National ADC1001 t ß Semiconductor ADC1001 10-Bit jaP Compatible A /D Converter General Description Easily interfaced to 6800 jxP derivatives with minimal external logic Differential analog voltage inputs Logic inputs and outputs meet both MOS and TTL volt­


    OCR Scan     		PDF ADC1001 10-Bit 20-pin ADC0801 16-bit 10bit ADC1001CCJ ADC1001CCJ-1 J20A LM336 NSC800 10 Bit Shift Register

    Untitled

    Abstract: No abstract text available
    Text: Fast PFET Buck Controller Does Not Require Compensation Description • The h ig h frequency oscillator allow s the use of sm all inductors a n d o u tp u t capacitors, m inim izing PC b o ard area and system s cost. The program m able soft start reduces current surges at start up.


    OCR Scan     		PDF CS51033 MS-012 MS-001 CS51033YD8 CS51033YDR8 CS51033YN8

    TMS626812

    Abstract: No abstract text available
    Text: TMS626812 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY _ SMOS687A -JULY 1 9 9 6- REVISED APRIL 1997 • • • Organization . . . 1M x 8 x 2 Banks 3.3-V Power Supply ± 10% Tolerance Two Banks for On-Chip Interleaving


    OCR Scan     		PDF TMS626812 1048576-WORD SMOS687A 83-MHz

    Untitled

    Abstract: No abstract text available
    Text: 19-1198; Rev0; 4/97 JV Y A Y A JV X / « to 3 -C ell, H ig h -C u rren t, Lo w -N o ise , S te p -U p D C -D C C o n v e rte rs w ith L in e a r R e g u la to r The MAX1705/MAX1706 are high-efficiency, low-noise, step-up DC-DC converters with an auxiliary linearregulator output. These devices are intended for use in


    OCR Scan     		PDF MAX1705/MAX1706 MAX1705 MAX1706 200mA. 537bb51 705/M

    Intel 2118

    Abstract: MB811B-10 DIP-16P-M01
    Text: MB8118-10 MB8118-12 FU JITSU M ICROELECTRONICS NMOS 16,384-BIT DYNAMIC RANDOM ACCESS MEMORY DESCRIPTION The MB8118 is fabricated using silicon-gate NMOS and Fujitsu’s ad­ vanced Double-Layer Polysilicon process. This process, coupled with single-transistor memory storage


    OCR Scan     		PDF 384-BIT MB8118 M88118 16-pin MB8118-10/MB8118-12 16-LEAD IP-16C-C03 DIP-16P-M01 Intel 2118 MB811B-10 DIP-16P-M01

    MCC72-12I01

    Abstract: v06v 06io1 diode c72
    Text: 4bE D • 4bôb22b 000116Ö 3 H I X Y I X Y S CORP BIXYS "T “25-Z3 Version 1 400 600 800 1200 1400 1600 MCC72-06ÌO1 MCC72-08ÎO1 MCC72-12Ì01 MCC72-14Ì01 MCC72-16Ì01 Test conditions ImMâi Ifmhs Tvj=T vjm Tc=85°C; 180°sin Itsmi Ifsm (di/dtJc Version 8


    OCR Scan     		PDF MCC72 MCD72 D72-04io8 D72-06io8 D72-08io8 MCD72-12iofi D72-14io8 D72-16io8 MCC72-06 MCC72-08 MCC72-12I01 v06v 06io1 diode c72

    trw 8040

    Abstract: l4b00
    Text: IBM11M16735B IBM11M16735C 16M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module - Buffered inputs except RAS, Data - Reduced noise (32 Vss/Vcc pins) - Buffered PDs • 16Mx72 Extended Data Out Mode DIMMs • Performance:


    OCR Scan     		PDF IBM11M16735B IBM11M16735C 16Mx72 104ns 50H8040 SA14-4631-02 trw 8040 l4b00

    lc87f

    Abstract: No abstract text available
    Text: Ordering number : ENN*6842 _ CMOS 1C LC8772C8B/B2B/96B/80B 8-Bit Single-Chip Microcontroller Preliminary Overview The L C 8772C 8B , L C 8772B 2B L C 8 7 7 2 9 6 B and L C 877280B are 8 bit single chip m icrocontrollers with the follow in g


    OCR Scan     		PDF LC8772C8B/B2B/96B/80B 8772C 8772B 877280B 877296B 877280B lc87f

    VG46VS8325

    Abstract: ic 3645 sh xaxs
    Text: VG46VS8325 131,072 x 32 x 2-Bit CM O S Synchronous Graphic RA M Preliminary Pin Assignment Top View Features • Fast access time from clock: 8/1Ons • Fast clock rate: 100/83MHz • Fully synchronous operation • Internal pipelined architecture • Dual internal banks(128K x 32-bit x 2-bank)


    OCR Scan     		PDF VG46VS8325 100/83MHz 32-bit cycles/16ms 100-pin 1G5-0057 IG5-0057 ic 3645 sh xaxs

    Untitled

    Abstract: No abstract text available
    Text: KM416C1OOOA/A-L/A-F CMOS DRAM 1M x 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tRAC tCAC tRC 60ns 15ns 110ns KM416C1000A-7/A-L7/A-F7 70ns 20ns 130ns KM416C1000A-8/A-L8/A-F8 80ns 20ns 150ns KM416C1000A-6/A-L6/A-F6


    OCR Scan     		PDF KM416C1OOOA/A-L/A-F KM416C1000A/A-L/A-F KM416C1 DQ1-DQ16 42-LEAD 44-LEAD

    KM48C2100ULL-6

    Abstract: No abstract text available
    Text: KM48C2100L/LL CMOS DRAM 2 M x 8 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM48C2100L/LL is a CMOS high speed 2,097,152 b itX 8 Dynamic Random Access Memory. It's design is optimized for high performance applications


    OCR Scan     		PDF KM48C2100L/LL KM48C2100ULL-6 KM48C21OOL/LL-7 KM48C21OOL/LL-8 110ns 130ns 150ns KM48C2100L/LL 28-LEAD

    HY53C464

    Abstract: HY53C464-70 536X4 65536x4
    Text: SIE D HYUNDAI ELECTRONICS • 4b7SOññ 0000SL3 32T « H Y N K MYUNDA HY53C464 SEMICONDUCTOI MK 4 liii M O* | U \ \ 1 M 121202 B-JAN 92 . FEATURES DESCRIPTION • Low power dissipation for HY53C464L — Operating Current, 100ns : 50mA (max.) — TTL Standby C u rren t: 2mA (max.)


    OCR Scan     		PDF G000Sb3 M121202B-JAN92 HY53C464 536X4 HY53C464L) HY53G464 PACKAGE-300 T-46-23-17 HY53C464-70 65536x4

    1601L

    Abstract: BY95A smd G5
    Text: Fast PFET Buck Controller does not require Compensation Description The CS-51033 is a switching con­ troller for use in DC-DC converters. It can be used in the buck topology with a minimum num ber of exter­ nal components. The CS-51033 con­ sists of a 1.0A power driver for con­


    OCR Scan     		PDF CS-51033 51033D8 51033N8 51033DR8 1601L BY95A smd G5

    KM41C4000/L

    Abstract: KM41C4000
    Text: SAMSUNG ELECTRONICS INC M 2E D 7^4142 QQ1D1S7 b ISM6K CMOS DRAM KM41C4000/L 4 M X 1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tR A C tC A C tflC K M 41C 4000/L- 8 80ns 20ns 150ns K M 41C 4000/L-10 100ns 25ns


    OCR Scan     		PDF KM41C4000/L 4000/L- 150ns 4000/L-10 100ns 180ns cycles/16ms cycles/128ms T-46-23-15 KM41C4000/L KM41C4000

    pmi op07

    Abstract: IC TTL 741 OP AMP PMI OP AMP pmi op42 op44 OPERATIONAL AMPLIFIERS PMI 2N4393 small signal amplifier JFET itt 2n4118 MAT-04
    Text: ^A N A LO G DEVICES AN-108 APPLICATION NOTE ► ONE TECHNOLOGY WAY • P.O. BOX 9106 • NORWOOD, MASSACHUSETTS 02062-9106 • 617/329-4700 JFET-lnput Amps Are Unrivaled for Speed and Accuracy by Peter Henry JFET-input amplifiers provide an economical means of achiev­


    OCR Scan     		PDF AN-108 OP-07. pmi op07 IC TTL 741 OP AMP PMI OP AMP pmi op42 op44 OPERATIONAL AMPLIFIERS PMI 2N4393 small signal amplifier JFET itt 2n4118 MAT-04

    IC 74C14

    Abstract: catalyst 2736 CI 74C00 capacitor 100vf AN23-2 24 volt 200 w to mosfet inverter circuit diagram ic cd4066 PTC104 Voltage to Current Converter dual 4-20mA scheme LT1006
    Text: r j untAß Application Note 23 April 1987 TECHNOLOGY Micropower Circuits for Signal Conditioning Jim Williams Low power operation of electronic apparatus has become increasingly desirable. Medical, remote data acquisition, power monitoring and other applications are good candi­


    OCR Scan     		PDF LT1G22 LT101Q LT1010 50uftc IC 74C14 catalyst 2736 CI 74C00 capacitor 100vf AN23-2 24 volt 200 w to mosfet inverter circuit diagram ic cd4066 PTC104 Voltage to Current Converter dual 4-20mA scheme LT1006

    CQ 765

    Abstract: No abstract text available
    Text: KMM594020A DRAM MODULES 4 M x 9 CMOS DRAM SIMM Memory Module, Low Power GENERAL DESCRIPTION FEATURES • Performance range: tRAC tcAC tñC KMM594020A-7 70ns 20ns 130ns KMM594020A-8 80ns 20ns 150ns KMM594020A-10 100ns 25ns 180ns Fast Page Mode operation CAS-before-RAS refresh capability


    OCR Scan     		PDF KMM594020A KMM594020A-7 KMM594020A-8 KMM594020A-10 100ns 130ns 150ns 180ns KMM594020A CQ 765

    Untitled

    Abstract: No abstract text available
    Text: □PM DPE256S8N Dense-Pac Microsystems. Inc. ^ 256K X 8 CMOS EEPROM MODULE PRELIMINARY D ESC R IP T IO N : The D PE256S8N is a 256K X 8 high-density, low-power EEPROM module comprised of two ceramic 128K X 8 m onolithic EE P R O M 's, an ad vanced high-speed


    OCR Scan     		PDF DPE256S8N PE256S8N DPE256S8N 600-mil-wide, 32-pin 30A04601

    e33i

    Abstract: IC1001
    Text: November 1990 Edition 2.0 FUJITSU DATA SHEET MB81C1001A-70L/-80L/-WL CMOS 1,048,576 BIT NIBBLE MODE DYNAMIC RAM CMOS 1M x 1 Bit Nibble Mode DRAM The Fujitsu M B81C1001A is a CMOS, fully decoded dynamic RAM organized as 1,048,576 words x 1 bit. The MB81C1001A has been designed lor mainframe


    OCR Scan     		PDF MB81C1001A-70L/-80L/-WL B81C1001A MB81C1001A 24-LEAD FPT-24P-M04) F24020S-2C MB81C1001A-70L MB81C1001A-80L MB81C1001A-10L e33i IC1001

    Untitled

    Abstract: No abstract text available
    Text: y v i y j x i > k i 100% D u t y Cycl e, L o w -Noi se, S t e p - D o w n , PWM DC-DC C o n v e r t e r Features The MAX887 high-efficiency, step-down DC-DC con­ verter provides an adjustable output from 1.25V to 10.5V. It accepts inputs from 3.5V to 11V and delivers


    OCR Scan     		PDF MAX887 300mV 500mA) MAX887 1-0041A

    Untitled

    Abstract: No abstract text available
    Text: O K I Semiconductor MSM5 14800A/ASL 524,288-Word x 8-Bit DYNAMIC RAM D E S C R IP T IO N The M SM514800A/ ASL is a new generation dynamic RAM organized as 524,288-word x 8-bit. The technology used to fabricate the M SM514800A/ASL is OKI's CMOS silicon gate process


    OCR Scan     		PDF 4800A/ASL 288-Word SM514800A/ SM514800A/ASL cycles/16m cycles/128ms b7E4240 MSM514800A/ASL

    HYM591000AM

    Abstract: bb04 HY531000
    Text: •HYUNDAI SEMICONDUCTOR HYM591000A Series 1M x 9-bit CMOS DRAM MODULE DESCRIPTION The HYM591000A is a 1M x 9-bit Fast page mode CM O S DRAM module consisting of two HY514400 and one HY531000 in 20/26 pin SO J on a 30 pin glass-epoxy printed circuit board. 0.22^F decoupling capacitor is mounted


    OCR Scan     		PDF HYM591000A HY514400 HY531000 HYM591000AM tWCHf31) BB04-20-M 04-20-M bb04

    KM44C1002A-8

    Abstract: No abstract text available
    Text: KM44C1002A_ CMOS DRAM 1M X 4 Bit CMOS Dynamic RAM with Static Column Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM 44C 1002A is a high speed CMOS 1 ,0 4 8 ,5 7 6 bit X 4 Dynamic Random Access Memory. Its design is optimized for high performance applications


    OCR Scan     		PDF KM44C1002A_ KM44C1002A KM44C1002A 20-LEAD KM44C1002A-8