301XX Search Results

Contextual Info: YK 301xx 0 x 0 J0G PDS: Rev :A STATUS:Released Printed: Jul 22, 2014

Contextual Info: C US YK 301xx 2 x 0 J0G PDS: Rev :A STATUS:Released Printed: Jul 22, 2014

Contextual Info: YK 301xx 1 x 0 J0G PDS: Rev :A STATUS:Released Printed: Jul 22, 2014

Contextual Info: YK 301xx 3 x 0 J0G PDS: Rev :A STATUS:Released Printed: Jul 22, 2014

MVL-301DR

Abstract: MVL-301G MVL-301HR MVL-301Y
Contextual Info: Unity Opto Technology Co., Ltd. MVL-301G MVL-301Y MVL-301HR MVL-301DR MVL-301UR 04/30/2002 Description Package Dimensions Unite: mm inches The MVL-301xx series package are T-1 (φ3mm) standard color diffused plastic lens package. The Hi-EFF red (HR) and yellow LED chips are made with Gallium Arsenide

MVL-301DR

Abstract: MVL-301G MVL-301HR MVL-301Y
Contextual Info: Unity Opto Technology Co., Ltd. MVL-301G MVL-301Y MVL-301HR MVL-301DR MVL-301UR Description Package Dimensions 3.00 .118 The MVL-301xx series package are T-1 (φ3mm) standard color diffused plastic lens package. The Hi-EFF red (HR) and yellow LED chips are made with Gallium Arsenide

vhdl code for register

Abstract: ORT82G5
Contextual Info: Accessing ORT82G5 Configuration Registers via the User Master Interface April 2003 Technical Note TN1038 Introduction The Lattice ORT82G5 Backplane Transceiver FPSC features many user-defined options and status indicators. These options and indicators are accessed through memory-mapped registers within the device. These 8-bit memory locations define and monitor various operations and states within the FPSC core. The memory structure is

3020 multimeter

Abstract: beckman 3010 multimeter beckman 3020 20B3 3010 multimeter
Contextual Info: DATE SYM REVISION RECORD 8/31 /9 9 - FIRST END: ISSUED AUTH, DR, CK, NT DG NYLON INSULATED MINIATURE TEST PROBE- NICKEL PLATED BRASS TIP NYLON INSULATION SECOND END: SHEATHED B AN AN A PLUG: NICKEL PLATED BRASS BODY BERYLLIUM COPPER SPRING POLYPROPYLENE INSULATION

AD30102

Abstract: E3P15
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

ORCA ORT42G5

Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

L67c

Abstract: L41C l44c L71C l75c transistor l57c IC L44C DATASHEET l31c L47c l51c
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs February 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

l37c 8 pin

Abstract: L41C G40TL l34c L43C L74c L18T l14c L25C ENCODER l31c
Contextual Info: ORCA ORT42G5 and ORT82G5 0.6 to 3.7 Gbps XAUI and FC FPSCs July 2008 Data Sheet DS1027 Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

D1485

Abstract: alarm clock verilog code 10Gb CDR D1488 free verilog code of prbs pattern generator D1486 BD-9F DDR pinout d1487 64b/66b encoder
Contextual Info: ispLever CORE TM 10Gb Ethernet XGXS IP Core User’s Guide User’s Guide July 2003 ipug15_01 Lattice Semiconductor 10Gb Ethernet XGXS IP Core User’s Guide Introduction Lattice’s 10GbE XGXS core provides an ideal solution that meets the need of today’s LAN/WAN applications. The

TSR 1-2450

Abstract: TMR 6-2411WI 12-0-12 transformer 500ma TRACOPOWER ten 5-1211 TEN 3-1213 TRACO POWER traco tma 1212d traco ten5 application note TSR 3-2450 tmr2e TEP-160
Contextual Info: Company Profile TRACO ELECTRONIC AG is a Swiss company with headquarter based in Zurich, Switzerland. As a leading power supply specialist with more than 30 years of experience we are dedicated to the design and manufacturing of high quality DC/DC and AC/DC

Contextual Info: INTERCONNECTS .100” Grid .018” dia. Pins, Straight and Right Angle Single Row Series 301, 310, 350, 399 • Series 3XX are available with straight and right angle solder tails. • Series 350 & 399.009 use MM #3404 and #5011 pins. See pages 179 & 181

484-pin BGA

Abstract: JC-115
Contextual Info: ORCA ORT42G5 and ORT82G5 0.6 to 3.7 Gbits/s XAUI and FC FPSCs March 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

L43T

Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs November 2007 Data Sheet DS1027 Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs August 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

TL 2272 DECODER

Abstract: 30014 TL 2262 tl 2262 am TL 2272 LU6X14FT Synopsys 2262 encoder l31c ORT82G5
Contextual Info: Preliminary Data Sheet July 2001 ORCA ORT82G5 1.0—1.25/2.0—2.5/3.125 Gbits/s Backplane Interface FPSC Introduction Agere Systems Inc. has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable

trivalent RoHs compliant

Abstract: nc 555 pushbutton footprint 38BH 335 11COMM
Contextual Info: Butt Contact Pushbutton Switches SERIES 04 4PST FEATURES • Joy Stick Action • Position Locator On CRT Screens • Moves Cursor On Menu Display DIMENSIONS In Inches and millimeters Basic Switch Bat Handle 04A-B01 .188 ± .005 (4,78 ± 0,13) DIAMETER .375 ± .005

verilog code of parallel prbs pattern generator

Contextual Info: ispLever CORE TM 10Gb Ethernet XGXS IP Core User’s Guide April 2004 ipug15_02 Lattice Semiconductor 10Gb Ethernet XGXS IP Core User’s Guide Introduction Lattice’s 10GbE XGXS core provides an ideal solution that meets the need of today’s LAN/WAN applications. The

MIP 411

Abstract: MIP 289 DVD BOARD LAYOUT 3011BH Power Factor Correction PAM Module intel 815 intel 82815 circuit diagram vga crtc svs 357 MIP 282
Contextual Info: R Intel 815 Chipset: Graphics Controller Programmer’s Reference Manual PRM July 2000 Order Number: 298237-001 Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0 R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

verilog code of prbs pattern generator

Contextual Info: ORCA ORT82G5 1.0-3.7 Gbits/s 8b/10b Backplane Interface FPSC October 2002 Preliminary Data Sheet Introduction Lattice Semiconductor has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORT82G5

Contextual Info: Data Sheet January 25, 2002 ORCA ORT82G5 1.0—1.25/2.0—2.5/3.125—3.5 Gbits/s 8b/10b SERDES Backplane Interface FPSC Introduction Lattice has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded system-on-chips SoC architecture, the