JTW 3D
Abstract: No abstract text available
Text: M v T h I I ü i k i i 11 U A HY62V8400A- I /HY62U8400A-(I) Series I 512Kx8bit CMOS SRAM PRELIMINARY DESCRIPTION FEATURES The HY62V8400A-(I)/HY62U8400A-(I) is a high speed, low power and 4M bits CMOS SRAM organized as 524,288 words by 8 bits. The HY62V8400A-(I)/HY62U8400A-(I) uses Hyundai's
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HY62V8400A-
/HY62U8400A-
512Kx8bit
HY62V8400A
HY62V8400A-I
HY62U8400A
JTW 3D
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57V651620B
Abstract: No abstract text available
Text: HY57V651620BTC 4Mx16-bit, 4K Ref., 4Banks. 3.3V D E S C R I PT I ON The Hynix H Y 5 7 V 6 4 162 0H G is a 67,1 0 8 ,8 64 -b it CMOS require large m e m o r y dens ity and high band wi dth . Synchronous DRAM, ideally suited for the main memory applications
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HY57V651620BTC
4Mx16-bit,
57V651620B
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N82S212N
Abstract: n82s212an N82S212 D3802
Text: Philips Components-Signetics Document No. 8 5 3 -0 1 3 6 ECN No. 86487 Date of Issue N ove m b e r 11, 1986 Status P ro du ct S pecification 8 2 S 2 1 2 8 2 S 2 1 2 A 2304-bit TTL bipolar RAM M em ory Products DESCRIPTION APPLICATIONS The o rga n izatio n of th e 8 2S 212 and
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2304-bit
N82S212N
n82s212an
N82S212
D3802
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m5m442256aj
Abstract: M5M442256A-1 5M442256AJ m5m442256a
Text: MITSUBISHI LSIs M5M442256AJ,L,TP, RT-7,-8,-10 FAST PAGE MODE 1 0 4 8 5 7 6 -B IT DUAL-PORT DYNAMIC RAM DESCRIPTION M 5 M 4 4 2 2 5 6 A J , L, TP, RT is a high speed 1048576-bit Dual Port Dynamic Memory equipped with a 2 5 6 K x 4 Dynamic RAM Port and a 5 1 2 x4 Serial Read/Write Port.
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M5M442256AJ
1048576-bit
33MHz.
00E471Ã
70pin
28P0K
28pin
40P0K
SOJ040-P-0400
40pin
M5M442256A-1
5M442256AJ
m5m442256a
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M5M482256
Abstract: M5M482256J
Text: MITSUBISHI LS Is M 5 M 4 8 2 2 5 6 J ,T P ,R T -7 ,-8 ,-1 0 FAST PAGE MODE 2097152-BIT DUAL-PORT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION TOP VIEW M5M482256J, TP, RT is a high speed 2097152-bit Dual-Port Dynamic Memory equipped with a 256K x 8 Dynamic RAM
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2097152-BIT
M5M482256J,
33MHz.
28P0K
28pin
40P0K
SOJ040-P-0400
40pin
M5M482256
M5M482256J
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TSOP54-2
Abstract: No abstract text available
Text: HYB39S6440x/80x/16xAT L 64M B it Synchronous DRAM SIEMENS 64 MBit Synchronous DRAM Advanced Inform ation • High Performance: -8 -10 Units fCKmax. 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns tCK2 10 12 ns tAC2 6 8 ns Multiple Burst Operation Automatic Command Programmable W rap Sequence: Sequential
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HYB39S6440x/80x/16xAT
P-TSOPII-54
400mil
64MBit
TSOP54-2
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Untitled
Abstract: No abstract text available
Text: KMM366S1623BTL PC66 SDRAM MODULE KMM366S1623BTL SDRAM DiMM 16Mx64 SDRAM DIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM366S1623BTL is a 16M bit x 64 Synchro • Performance range nous Dynamic RAM high density memory module. The Samsung
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KMM366S1623BTL
KMM366S1623BTL
16Mx64
40Qmil
168-pin
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0117800T3-60
Abstract: No abstract text available
Text: IBM0117800 IBM0117800M IBM0117800B IBM0117800P 2 M x 8 11/10 DRAM Features • 2,097,152 word by 8 bit organization • Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply • Standard Power SP and Low Power (LP) • 2048 Refresh Cycles - 32 ms Refresh Rate (SP version)
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IBM0117800
IBM0117800M
IBM0117800B
IBM0117800P
200nA
0117800T3-60
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M5M482128AJ
Abstract: No abstract text available
Text: MITSUBISHI LSIs M 5 M 4 8 2 1 2 8 A J , T P , R T - 7 ,- 8 ,- 1 0 FAST PAGE MODE 1 0 4 8 S 7 6 -B IT DUAL-PORT DYNAMIC RAM DESCRIPTION M 5 M 4 8 2 1 2 8 A J , T P , RT is a high speed 1 0 4 8 5 7 6 -b it Dual Port Dynam ic M em o ry equipped w ith a 1 2 8 K x
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70pin
28P0K
28pin
40P0K
SOJ040-P-0400
40pin
M5M482128AJ
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Untitled
Abstract: No abstract text available
Text: »«YUWPA! > — - • HY57V658010 2 Banks x 4 M x 8 8 it Synchronous DRAM DESCRIPTION The Hyundai H Y57V 658010 is a 67,108, 864-bit C M O S Synchronous DRAM, ideally suited for the main memory appli cations which require large memory density and high bandwidth. H Y 57V 658010 is organized as 2banks of
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HY57V658010
864-bit
304x8.
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M5M482257
Abstract: No abstract text available
Text: MITSUBISHI LSIs M 5 M 4 8 2 2 5 7 J ,T P ,R T -7 ,-8 ,-1 0 HYPER PAGE MODE 2097152-BIT DUAL-PORT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION TOP VIEW M 5 M 482 257 J, TP, RT is a high speed 2097152-bit Dual-Port Dynamic Memory equipped w ith a 2 5 6K x 8 Dynamic RAM
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2097152-BIT
33MHz.
00E471Ã
70pin
28P0K
28pin
40P0K
SOJ040-P-0400
40pin
M5M482257
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V1004C
Abstract: SA5V 3DQ11
Text: KM416C1004C, KM416C1204C KM416V1004C, KM416V1204C CMOS DRAM 1M x 16Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This Is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage +5.0V or +3.3V , refresh cyde (1K Ref. or 4K
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KM416C1004C,
KM416C1204C
KM416V1004C,
KM416V1204C
16Bit
1Mx16
64ms/16ms
V1004C
SA5V
3DQ11
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