Untitled
Abstract: No abstract text available
Text: November 1993 Edition 2.0 FUJITSU DATA SHEET : MB82009-20/-25 CMOS 1M-BIT HIGH SPEED SRAM 131,072-WORD X 9-BIT HIGH SPEED STATIC RANDOM ACCESS MEMORY The Fujitsu MB82009 is 131,072-word x 9-bit high speed static random access m em ory fabricated w ith CMOS technology.
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MB82009-20/-25
072-WORD
MB82009
36-LEAD
LCC-36P-M01)
36051S-2C
374T75b
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Untitled
Abstract: No abstract text available
Text: January 1994 Edition 1.0 FUJITSU DATA SHEET MB82009-17 CMOS 1M-BIT HIGH SPEED SRAM 131,072-WORD x 9-BIT HIGH SPEED STATIC RANDOM ACCESS MEMORY The Fujitsu MB82009 is 131,072-word x 9-bit high speed static random access memory fabricated with CMOS technology.
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MB82009-17
072-WORD
MB82009
400mil
JV0004-941J1
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max1993
Abstract: 10POW
Text: May 1993 Edition 1.0 FUJITSU DATA S H E E T MB82208-25/-35 CMOS 4M-BIT HIGH SPEED SRAM 524,288-WORD X 8-BIT HIGH SPEED STATIC RANDOM ACCESS MEMORY The Fujitsu MB82208 is 524,288-word x 8-bit high speed static random access memory fabricated with CMOS technology.
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MB82208-25/-35
288-WORD
MB82208
400mil
SD-07289-1
0-93-DS
max1993
10POW
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MB8289-35
Abstract: MB8289 MB8289-25
Text: <p April 1990 Edition 2.0 ' — ~ — — DATASHEET — MB8289-25/-35 CMOS 288K-BIT HIGH-SPEED SRAM 32K Words x 9 Bits Static Random Access Memory with Automatic Power Down The Fujitsu MB8289 is a 32,768 words x 9 bits static random access memory with parity generator and checker, and fabricated with CM OS technology. To obtain a
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MB8289-25/-35
288K-BIT
MB8289
MB8289-25
MB8289-35
32-LEAD
DIP-32P-M02)
32009S
MB8289-35
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Untitled
Abstract: No abstract text available
Text: I , -> g o u l d AMILSemiconductors PA7024 PEEL» Airay Preliminary Data Sheet PA7024 Features • Logic Integration and C ustom ization of: — PLDs, SSI/MSI, random logic, decoders, encoders, muxes, comparators, shifters, counters, state machines, etc. • U ser-Configurable High Density Logic Array
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PA7024
140mA
13ns/20ns
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Untitled
Abstract: No abstract text available
Text: Preliminary Data INTERNATIONAL CMOS TECHNOLOGY, INC. March 1991 PEEL 22CV10A CMOS Programmable Electrically Erasable Logic Device Features • Advanced CMOS EEPROM Technology Architectural Flexibility — 132 product term x 44 input AND array — Up to 22 inputs and 10 outputs
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22CV10A
12-configuration
110mA
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Untitled
Abstract: No abstract text available
Text: H O LTE K r r H T 8 1R 3 0 5.6 Sec Speech Chip with EPROM Features • • • • • • • O perating voltage: 3.5V~5.0V 5.6-second voice capacity a t about 6kHz sam pling rate Functions com patible with the H T811XX, H T812X X an d H T813X X series speech
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T811XX,
T812X
T813X
is/22m
s/180m
200ki2/100ki2/50ki2/20ki2
HT81R30
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18CV8
Abstract: 18CV8-15 18CV815 ami equivalent gates 18CV825 PEEL18CV8
Text: PEEL 18CV8 AMI SEMICONDUCTORS February 1993 CMOS Programmable Electrically Erasable Logic Device Features General Description The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,
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18CV8
PEEL18CV8
480Ki2
480KD
18CV8
18CV8-15
18CV815
ami equivalent gates
18CV825
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pin diagram and block diagram of 74ls74
Abstract: TTL 74LS74 Micron TLC 74ls74 timing setup hold pin DIAGRAM OF IC 74ls74
Text: nn.„ n r u u u lu AMI • Semiconductors CMOS Programmable Electrically Erasable Logic Amy Device Preliminary Data PEEL PA7040 General Description Features U ser-C o n fig u ra b le High D ensity Lo g ic A rray • • • • Create multi-level l/O-buried logic circuits
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PA7040
PA7040
PA7040s
pin diagram and block diagram of 74ls74
TTL 74LS74
Micron TLC
74ls74 timing setup hold
pin DIAGRAM OF IC 74ls74
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