54ACT11010 Search Results

54ACT11010 Datasheets (4)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
54ACT11010		Texas Instruments	TRIPLE 3-INPUT POSITIVE-NAND GATES		Original	PDF
54ACT11010		Texas Instruments	TRIPLE 3-INPUT POSITIVE-NAND GATES		Original	PDF
54ACT11010FK		Texas Instruments	IC NAND GATE TRIPLE 3IN CMOS 20LCCC		Original	PDF
54ACT11010J		Texas Instruments	IC NAND GATE TRIPLE 3IN CMOS 16CDIP		Original	PDF

54ACT11010 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
54ACT11010 Abstract: 74ACT11010 D2957 Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise	Original	54ACT11010, 74ACT11010 SCAS018A D2957, 500-mA 300-mil 54ACT11010 54ACT11010 74ACT11010 D2957	PDF
Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ą ą SCAS018A − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • 54ACT11010 . . . J PACKAGE 74ACT11010 . . . D OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize	Original	54ACT11010, 74ACT11010 SCAS018A D2957, 54ACT11010 500-mA 300-mil	PDF
Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A- 02957, JULY 1987 - REVISED APRIL 1993 54ACT11010. . . J PACKAGE 74ACT11010. . . 0 OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin V^c and GND Configurations	OCR Scan	54ACT11010, 74ACT11010 SCAS018A- 500-mA 300-mil 54ACT11010	PDF
Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A —D2957, JULY 1 9 8 7 -R E V IS E D A P R IL 1 9 9 3 54ACT11010. . . J PACKAGE 74ACT11010. . . D OR N PACKAGE * Inputs Are TTL-Voltage Compatible * Flow-Through Architecture to Optimize PCB Layout	OCR Scan	54ACT11010, 74ACT11010 SCAS018A D2957, 54ACT11010. 74ACT11010. 500-mA 300-mil	PDF
54ACT11010 Abstract: 74ACT11010 D2957 Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise	Original	54ACT11010, 74ACT11010 SCAS018A D2957, 500-mA 300-mil 54ACT11010 54ACT11010 74ACT11010 D2957	PDF
Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES T0049— 2957, JU LY 1967— REVISED MARCH 1990 54ACT11010 . . . J PACKAGE 74ACT11010 . . . O OR N PACKAGE • Inputs are TTL-Voltage Compatible • Flow-Through Architecture to Optimize PCB Layout	OCR Scan	54ACT11010, 74ACT11010 T0049-- 500-mA 300-mll 54ACT11010	PDF
54ACT11010 Abstract: 74ACT11010 Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES T0049— 2957, JULY 1987— REVISED MARCH 1990 • Inputs are TTL-Voltage Compatible 5 4A C T 11 0 10 . . . J P A C K A G E 74A C T11010 . . . D OR N PACKAGE Flow-Through Architecture to Optimize PCB	OCR Scan	54ACT11010, 74ACT11010 T0049â 500-mA 300-mil 54ACT11010 74ACT11010	PDF
54ACT11010 Abstract: 74ACT11010 D2957 Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ą ą SCAS018A − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • 54ACT11010 . . . J PACKAGE 74ACT11010 . . . D OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize	Original	54ACT11010, 74ACT11010 SCAS018A D2957, 54ACT11010 500-mA 300-mil 54ACT11010 74ACT11010 D2957	PDF
54ACT11010 Abstract: 74ACT11010 D2957 Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A- D2957, JULY 1987 - REVISED APRIL 1993 54ACT11010 . . . J PACKAGE 74ACT11010 . . . D OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-PIn Vcc and GND Configurations	OCR Scan	54ACT11010, 74ACT11010 SCAS018A- D2957, 500-mA 300-mil 54act11010. 74act11010 00cl42bIÃ 54ACT11010 D2957	PDF