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    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V
    Text: fax id: 5422 CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V PRELIMINARY 8K/16K/32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 8K/16K/32K/64Kx18 CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V

    723653

    Abstract: 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260
    Text: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. July’00 IDT FIFO Memory Products Quick Reference Guide


    Original     		PDF 512-bit 16K-bit 64K-bit 128K-bit 256K-bit 512K-bit 100MHz 133MHz 723653 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260

    723653

    Abstract: BI 7284 72V7250 72V72100 72V7230 72V7240 72V7260 72V7270 72V7280 72V7290
    Text: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. Jan’00 IDT FIFO Memory Products Quick Reference Guide


    Original     		PDF 512-bit 16K-bit 64K-bit 128K-bit 512K-bit 7236x3/72V36x3 723653 BI 7284 72V7250 72V72100 72V7230 72V7240 72V7260 72V7270 72V7280 72V7290

    Untitled

    Abstract: No abstract text available
    Text: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,


    Original     		PDF IDT72T1845, IDT72T1855 18-BIT/9-BIT IDT72T1865, IDT72T1875 IDT72T1885, IDT72T1895 IDT72T18105, IDT72T18115 IDT72T18125

    IDT72V275

    Abstract: IDT72V281 IDT72V285 IDT72V291
    Text: N E W S R E L E A S E FOR IMMEDIATE RELEASE FOR FURTHER INFORMATION: Diana Lorang, IDT Corporate Communications Phone/Email: 408 492-8210; lorang@idt.com Camille Aagard, Tsantes & Associates Phone/Email: (408)369-1500; camille@tsantes.com INTEGRATED DEVICE TECHNOLOGY ANNOUNCES INDUSTRY’S


    Original     		PDF 1998--Integrated 800/9-IDT-FAX. IDT72V275 IDT72V281 IDT72V285 IDT72V291

    330 j65

    Abstract: CY7C4261V CY7C4271V CY7C4281V CY7C4291V CY7C42X1V
    Text: 261V/CY7C CY7C4261V/CY7C4271V CY7C4281V/CY7C4291V 16K/32K/64K/128Kx9 Low Voltage Deep Sync FIFOs Features Functional Description • 3.3V operation for low power consumption and easy integration into low voltage systems • High-speed, low-power, first-in first-out FIFO


    Original     		PDF 61V/CY7C CY7C4261V/CY7C4271V CY7C4281V/CY7C4291V 16K/32K/64K/128Kx9 CY7C4261V) CY7C4271V) CY7C4281V) CY7C4291V) 35-micron 100-MHz 330 j65 CY7C4261V CY7C4271V CY7C4281V CY7C4291V CY7C42X1V

    CY7C4281V

    Abstract: CY7C4291V CY7C42X1V
    Text: fax id: 5423 CY7C4281V CY7C4291V PRELIMINARY 64K/128Kx9 Low Voltage Deep Sync FIFOs Features • Pin-compatible 3.3V solutions for CY7C4281/91 • 3.3V operation for low power consumption and easy integration into low voltage systems • High-speed, low-power, first-in first-out FIFO


    Original     		PDF CY7C4281V CY7C4291V 64K/128Kx9 CY7C4281/91 CY7C4281V) CY7C4291V) 67-MHz CY7C4281V CY7C4291V CY7C42X1V

    CY7C4275V

    Abstract: CY7C4285V CY7C42X5V
    Text: fax id: 5422 CY7C4275V CY7C4285V PRELIMINARY 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4275V/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4275V CY7C4285V 32K/64Kx18 CY7C4275V/85V CY7C42X5V CY7C4275V CY7C4285V

    64Kx8 dual-port CMOS RAM

    Abstract: 64Kx8 CMOS RAM BF208 fast sram 100mhz BC256 70V3379 70V9079 70V9089 70V9099 70V9189
    Text: THE MOST COMMONLY ASKED QUESTIONS ABOUT SYNCHRONOUS DUAL-PORT SRAMS APPLICATION NOTE AN-254 By Cheryl Brennan What is a dual-port? A dual-port SRAM is a single static RAM array with two sets of address, data, and control signals typically left and right for accessing that array.


    Original     		PDF AN-254 64Kx8 dual-port CMOS RAM 64Kx8 CMOS RAM BF208 fast sram 100mhz BC256 70V3379 70V9079 70V9089 70V9099 70V9189

    70V18

    Abstract: A12L A13L A15L A15R IDT70V18 IDT70V18L
    Text: PRELIMINARY IDT70V18L HIGH-SPEED 3.3V 64K x 9 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 15/20ns max. Low-power operation – IDT70V18L


    Original     		PDF IDT70V18L 15/20ns 440mW IDT70V18 70V18 70V18 A12L A13L A15L A15R IDT70V18L

    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC
    Text: CY7C4255V, CY7C4265V CY7C4275V, CY7C4285V 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description • 3.3V operation for low power consumption and easy integration into low voltage systems ■ High speed, low power, first-in first-out FIFO memories


    Original     		PDF CY7C4255V, CY7C4265V CY7C4275V, CY7C4285V 32K/64Kx18 CY7C4255V) CY7C4265V) CY7C4275V) CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC

    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC
    Text: CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 32K/64Kx18 CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V CY7C42X5V-ASC

    IDT72T18105

    Abstract: IDT72T18115 IDT72T18125 IDT72T1845 IDT72T1855 IDT72T1865 IDT72T1875 IDT72T1885 IDT72T1895
    Text: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,


    Original     		PDF IDT72T1845, IDT72T1855 18-BIT/9-BIT IDT72T1865, IDT72T1875 IDT72T1885, IDT72T1895 IDT72T18105, IDT72T18115 IDT72T18125 IDT72T18105 IDT72T18115 IDT72T18125 IDT72T1845 IDT72T1855 IDT72T1865 IDT72T1875 IDT72T1885 IDT72T1895

    32kx18

    Abstract: No abstract text available
    Text: 2.5 VOLT HIGH-SPEED TeraSync FIFO PRELIMINARY IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,


    Original     		PDF IDT72T1845, IDT72T1855 18-BIT/9-BIT IDT72T1865, IDT72T1875 IDT72T1885, IDT72T1895 IDT72T18105, IDT72T18115 IDT72T18125 32kx18

    CY7C4282

    Abstract: CY7C4292
    Text: CY7C4282 CY7C4292 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 64K x 9 (CY7C4282) • 128K × 9 (CY7C4292) • 0.5-micron CMOS for optimum speed/power


    Original     		PDF CY7C4282 CY7C4292 64K/128K CY7C4282) CY7C4292) 100-MHz 10-ns CY7C4282/CY7C4292 CY7C4282 CY7C4292

    Untitled

    Abstract: No abstract text available
    Text: AEPSX64K9 64Kx9 STATIC RAM MODULE July 25, 1990 > > 65,536 x 9 Organization > > Double sided to maximize bit density > > Low 0.66" stand-off height suited to 0.8" card spacing > > Completely Static operation > > TTL compatible > > Low power, battery back-up


    OCR Scan     		PDF AEPSX64K9 64Kx9 AEPSX64K9

    Untitled

    Abstract: No abstract text available
    Text: CYM4208 CYM4209 PRELIMINARY CYPRESS SEMICONDUCTOR Cascadable 64Kx9FIFO Cascadable 128K x 9 FIFO Features Functional Description • 64K x 9 FIFO buffer memory 4208 or 128K x 9 FIFO buffer memory (4209) T h e CYM 4208 is a first-in first-out (F IF O ) m em ory m o d u le th a t is 64K w ords by 9 bits


    OCR Scan     		PDF CYM4208 CYM4209 28-pin 600-mil 64Kx9FIFO

    Untitled

    Abstract: No abstract text available
    Text: P4C231 ADVANCE INFORM 64Kx9 BIT SYNCHRONOUS SRAM with BURST MODE and SELF-TIMED WRITE FEATURES • Pin-Compatible Upgrade from 32Kx9 Synchronous SRAM 5V ±10% Power Supply ■ TTL Compatible Inputs and Outputs Built-in Burst Address Generator for i486 Burst


    OCR Scan     		PDF P4C231 64Kx9 32Kx9 44-pin 66MHz P4C231 824-bit 256KByte

    Untitled

    Abstract: No abstract text available
    Text: P4C231 — ‘ : • -s- ' ' * " 64Kx9 BIT SYNCHRONOUS SRAM with BURST MODE and SELF-TIMED WRITE -FEATURES • Pin-Compatible Upgrade from 32Kx9


    OCR Scan     		PDF P4C231 64Kx9 32Kx9 66MHz 44-pin 824-bit 256KByte ata0-31 P4C231

    4281V

    Abstract: No abstract text available
    Text: fax id: 5423 CY7C4281V CY7C4291V •■■■■■■'■jH/m'r. 'S^ia S S K , : ,„*$& :*■ _ . " T jjjl? 64K/128Kx9 Low Voltage Deep Sync FIFOs • Pin-compatible 3.3V solutions for CY7C4281/91 Features • 3.3V operation for low power consumption and easy


    OCR Scan     		PDF CY7C4281V CY7C4291V 64K/128Kx9 CY7C4281V) CY7C4291V) 67-MHz 4281V

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5423 CY7C4261V/CY7C4271V CY7C4281V/CY7C4291V 16K/32K/64K/128Kx9 Low Voltage Deep Sync FIFOs Features Functional Description 3.3V operation for low power consumption and easy integration into low voltage systems High-speed, low-power, first-in first-out FIFO


    OCR Scan     		PDF CY7C4261V/CY7C4271V CY7C4281V/CY7C4291V 16K/32K/64K/128Kx9 CY7C4261V) CY7C4271V) CY7C4281V) CY7C4291V) 35-micron 67-MHz

    CY7C4261V

    Abstract: CY7C4271V CY7C4281V CY7C4291V CY7C42X1V
    Text: •= CY7C4261V/CY7C4271V CY7C4281V/CY7C4291V CYPRESS 16K/32K/64K/128Kx9 Low Voltage Deep Sync FIFOs Features Functional Description 3.3V operation for low power consumption and easy integration into low voltage systems High-speed, low-power, first-in first-out FIFO


    OCR Scan     		PDF CY7C4261V/CY7C4271V CY7C4281V/CY7C4291V 128Kx9 CY7C4261V) CY7C4271V) CY7C4281V) CY7C4291V) 35-micron 100-MHz CY7C4261V CY7C4271V CY7C4281V CY7C4291V CY7C42X1V

    7m812

    Abstract: IDT7M S1319 Idt7m812
    Text: 512K 6 4 K x 8-BIT or 64K x 9-BIT C M O S STATIC RAM M ODULE IDT 7M812 IDT 7M912 FEATURES: DESCRIPTION: • High-density 512K-bi1 C M O S static RAM module • 64K x 8 (IDT7M 812) or 64K x 9 (IDT7M 912) configuration • Fast access times The ID T7M 812/ID T7M 912 are 512K-bit high-speed CM OS


    OCR Scan     		PDF 512K-bi1 240yW IDT7187 7M812 7M912 812/ID MIL-STD-883, 7M912 IDT7M S1319 Idt7m812

    XTCE

    Abstract: oasi CY7C4282 CY7C4292 EF 6802 P
    Text: fax id: 5419 CY7C4282 CY7C4292 PRELIMINARY 64K/128Kx9 Deep Sync FIFOs Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 64k x 9 (CY7C4282) • 128k x 9 (CY7C4292) • 0.5 micron CMOS for optimum speed/power • High-speed, Near Zero Latency (True Dual-Ported


    OCR Scan     		PDF CY7C4282) CY7C4292) 100-MHz XTCE oasi CY7C4282 CY7C4292 EF 6802 P