SL82S09
Abstract: lansdale 82S09
Text: KAY r .M SL82S09 LANSDALE 576-BIT 64x9 BIPOLAR RAM SEMICONDUCTOR, IN C . DESCRIPTION APPLICATIONS The organization of this device allows byte manipulation of data, including parity, Where parity Is not monitored, the ninth bit can be used as a flag or status indicator for
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82S09
SL82S09
lansdale
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Untitled
Abstract: No abstract text available
Text: CMOS SyncFIFO 64X9, 256x9, 512x9, 1024 X 9, 2048 X 9 and 4096 x 9 FEATURES: • • • • • • • • • • • • • • • • • • 64 x 9-bit organization IDT72421 256 x 9-bit organization (IDT72201) 512 x 9-bit organization (IDT72211)
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256x9,
512x9,
IDT72421)
IDT72201)
IDT72211)
IDT72221)
IDT72231)
IDT72241)
IDT72421/72201/72211)
IDT72221/72231/72241)
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26551
Abstract: IDT72201
Text: MÛ2 S 77 1 0 D 5 b 4 3 E 453 CMOS SyncFlFO 64X9, 256x9, 512x9, 1024 X 9, 2048 X 9 and 4096 x 9 Integrated Device Technology, Inc. 1DT72421 IDT72201 IDT72211 IDT72221 IDT72231 IDT72241 FEATURES: DESCRIPTION: • • • • • • • • • • • •
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256x9,
512x9,
1DT72421
IDT72201
IDT72211
IDT72221
IDT72231
IDT72241
IDT72421)
IDT72201)
26551
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ram 7489
Abstract: 74ls189 ram 74LS289 ci 7489 ci 9410 74LS189 16x4-Bit pin diagram 7489 IRF 725 7489 logic diagram
Text: •U Ç>> N> Item 16x4 16x4 16x4 7489 16x4 9410 CO fO 16x4 o> cn A 256x1 93410 256x1 93411A 256x1 93410A CO 00 -vj 256x1 93411 o 256x1 93L420 256x1 93421 64x9 93419 256x1 j 93L421 CO ro 256x1 93421A 256x4 93412 ro cn 05 X A 93L412 Organization cn cn a cn a
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54LS/74LS89<
54LS/74LS189
54LS/74LS289
256x1
3410A
3411A
ram 7489
74ls189 ram
74LS289
ci 7489
ci 9410
74LS189
16x4-Bit
pin diagram 7489
IRF 725
7489 logic diagram
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Untitled
Abstract: No abstract text available
Text: IN T E G R A T E D DEVICE, böE D MÛ 25 77 1 G D 1 3 77 Ö b2D CMOS SyncFlFO 64X9, 256x9, 512x9, 1024 X 9, 2048 X 9 and 4096 x 9 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • • 64 x 9-bit organization IDT72421
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256x9,
512x9,
IDT72421)
IDT72201)
IDT72211)
IDT72221)
IDT72231)
IDT72241)
IDT72421/72201/72211)
IDT72221/72231/72241)
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82S09
Abstract: N82S19 82S19 N82S09 S82S09 S82S19 n82s
Text: BIPOLAR M EM O R Y DIVISION M AY 1982 576-BIT BIPOLAR RAM 64 X 9 82S09/82S19 (O.C.) DESCRIPTION APPLICATIONS The organization of this device allows byte storage of data, including parity. Where par ity is not monitored, the ninth bit can be used as a tag or status indicator for each word
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576-BIT
82S09/82S19
82S09
82S19
82S09/19
CYCLE/82S09
N82S19
N82S09
S82S09
S82S19
n82s
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Untitled
Abstract: No abstract text available
Text: P4C231 ADVANCE INFORM 64Kx9 BIT SYNCHRONOUS SRAM with BURST MODE and SELF-TIMED WRITE FEATURES • Pin-Compatible Upgrade from 32Kx9 Synchronous SRAM 5V ±10% Power Supply ■ TTL Compatible Inputs and Outputs Built-in Burst Address Generator for i486 Burst
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P4C231
64Kx9
32Kx9
44-pin
66MHz
P4C231
824-bit
256KByte
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Untitled
Abstract: No abstract text available
Text: P4C231 — ‘ : • -s- ' ' * " 64Kx9 BIT SYNCHRONOUS SRAM with BURST MODE and SELF-TIMED WRITE -FEATURES • Pin-Compatible Upgrade from 32Kx9
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P4C231
64Kx9
32Kx9
66MHz
44-pin
824-bit
256KByte
ata0-31
P4C231
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Untitled
Abstract: No abstract text available
Text: QS7230HD ADVANCE INFORMATION High-Speed CMOS 64 x 9 x 2 Bi-directional FIFO with High-Drive Outputs Q QS7230HD FEATURES • • • • • • Clocked interface bi-directional FIFO 64-mA bus drive capability on both ports 66-MHz cycle time with symmetrical clocks
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QS7230HD
QS7230HD
64-mA
66-MHz
40-pin
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Untitled
Abstract: No abstract text available
Text: QS7230HD ADVANCE INFORMATION High-Speed CMOS 64 x 9 x 2 Bi-directional FIFO with High-Drive Outputs Q q s 723 ohd FEATURES Metastable hardened flags Input noise filters on control lines Hot-pluggable Width expandable Register-like outputs show current word in FIFO
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QS7230HD
64-mA
66-MHz
40-pin
150-mil
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mr 044
Abstract: No abstract text available
Text: 2708 ¡^National Æm Semiconductor 74AC2708«74ACT2708 64 x 9 First-In, First-Out Memory General Description The 'AC/’ACT2708 is an expandable first-in, first-out memo ry organized as 64 words by 9 bits. An 85 MHz shift-in and 60 MHz shift-out typical data rate makes it idea for high
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74AC2708
74ACT2708
ACT2708
74ACT
mr 044
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SECDED
Abstract: sram 16k8 EP3SE50
Text: 4. TriMatrix Embedded Memory Blocks in Stratix III Devices SIII51004-1.1 Introduction TriMatrix embedded memory blocks provide three different sizes of embedded SRAM to efficiently address the needs of Stratix III FPGA designs. TriMatrix memory includes 640-bit memory logic array blocks
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SIII51004-1
640-bit
144-Kbit
M144K
SECDED
sram 16k8
EP3SE50
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Untitled
Abstract: No abstract text available
Text: fax id: 5418 CYPRESS CY7C4421V/4201V/4211V/4221 V PRELIMINARY CY7C4231 V/4241 V/4251 V Low Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs • 32-pln PLCC F e a tu r e s Functional Description • High-speed, low-power, first-ln, first-out FI FO memories
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64/256/512/1K/2K/4K/8K
CY7C4421V)
CY7C4Z01V)
421IV)
CY7C4221V)
CY7C4231V)
CY7C4241V)
CY7C4251V)
66-MHz
32-Lead
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verilog code for huffman coding
Abstract: huffman encoding and decoding using VHDL jpeg encoder vhdl code huffman decoder verilog X9103 ecs decoder Huffman huffman encoder for source generation rgb yuv Verilog X9102
Text: X_JPEG CODEC February 28, 2000 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core 300-2908 South Sheridan Way Oakville, ON Canada, L6J 7J8 Phone: +1 905 829 8889 Fax: +1 905 829 0888 E-mail: sales@xentec-inc.com URL: www.xentec-inc.com
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Untitled
Abstract: No abstract text available
Text: fax id: 5409 CY7C4421/4201/4211/4221 C Y7C4231/4241/4251 CYPRESS 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Features Functional Description High-speed, low-power, first-in, first-out FIFO memories 64 x 9 (CY7C4421) 256 X 9 (CY7C4201) 512 x 9 (CY7C4211)
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CY7C4421)
CY7C4201)
CY7C4211)
CY7C4221)
CY7C4231)
CY7C4241)
CY7C4251)
100-MHz
32-pin
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67C402
Abstract: No abstract text available
Text: a 67C401/13 67C402/23 First-In First-Out FIFO 64x4, 64x5 CMOS MEMORY Advanced Micro Devices 25/35 MHZ (Cascadable) FEATURES ORDERING INFORMATION 67 C 401 - 35 N • Zero standby power • High-tpeed 35-MHz shlft-ln/shlft-out rate* OPERATING — _ CONDITIONS
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67C401/13
67C402/23
35-MHz
67C4013/23)
Ou02/23
67C402
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Triton P54C
Abstract: cy7c37128 62128 SRAM adapter 48-pin TSOP CY7C37192 CYM74P436 CY3501A CY7C37512 MIB 30 Product Selector Guide
Text: Product Selector Guide Fast Static RAMs Organization/Density Density X1 X4 X4 SIO X8 4K 7C147 2147 7C123 7C148 7C149 7C150 2148 2149 7C122 9122 93422 16K 7C167A 7C168A 7C128A 6116 64K to 72K 7C187 7C164 7C166 7C185 6264 7C182 256K to 288K 7C197 7C194 7C195
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7C147
7C123
7C148
7C149
7C150
7C122
7C167A
7C168A
7C128A
7C187
Triton P54C
cy7c37128
62128 SRAM
adapter 48-pin TSOP
CY7C37192
CYM74P436
CY3501A
CY7C37512
MIB 30
Product Selector Guide
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L100k
Abstract: No abstract text available
Text: Single PRELIMINARY , , Copy v “ 1 3 l l Q 1 0 DEVICE SPECIFICATION \ QM1600S ECL/TTL LOGIC ARRAY WITH RAM FEATURES ECL LOGIC AND RAM COMBINED 002335 The QM1600S is configured to provide up to 1600 equi valent gates of high speed ECL logic coupled with 1280
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QM1600S
QM1600
L100k
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Untitled
Abstract: No abstract text available
Text: CY7C4421/4201/4211/4221 CY7C4231/4241/4251 WS0 CYPRESS 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs • Low operating power I X 2 = 50 mA • Output Enable (OE pin • 32-pin PLCC/TQFP Features • 64 x 9 (CY7C4421) • 256 x 9 (CY7C4201) • 512 x 9 (CY7C4211)
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CY7C4421/4201/4211/4221
CY7C4231/4241/4251
64/256/512/1K/2K/4K/8K
32-pin
CY7C4421)
CY7C4201)
CY7C4211)
CY7C42X1
7C4251â
32-Lead
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CY7C4201V
Abstract: CY7C4211V CY7C4231 CY7C4421 CY7C4421V 1 to N to511 4251V
Text: CY7C4421V/4201V/4211V/4221 V CY7C4231 V/4241 V/4251 V 5r CYPRESS Low Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Features • 32-pin PLCC H ig h -s p e ed , low -pow er, first-in , firs t-o u t F IF O m e m o ries Functional Description 6 4 x 9 (C Y 7 C 44 21 V )
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CY7C4421
CY7C4231
64/256/512/1K/2K/4K/8K
CY7C4421V)
CY7C4201V)
512x9
CY7C4211V)
CY7C4221V)
CY7C4231V)
CY7C4241V)
CY7C4201V
CY7C4211V
CY7C4421V
1 to N
to511
4251V
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verilog for SRAM 512k word 16bit
Abstract: CY62512V CYM74P436 192-Macrocell 62128 sram 7C1350 Triton P54C palce16v8 programming guide 7C168A intel 16k 8bit RAM chip
Text: Product Selector Guide Static RAMs Organization/Density Density X1 X4 4K X8 X9 X16 X18 X32 X36 7C148 7C149 7C150 16K 7C167A 7C168A 7C128A 6116 64K to 72K 7C187 7C164 7C166 7C185 6264 7C182 256K to 288K 7C197 7C194 7C195 7C199 7C1399/V 62256/V 62256V25 62256V18
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7C148
7C149
7C150
7C167A
7C168A
7C128A
7C187
7C164
7C166
7C185
verilog for SRAM 512k word 16bit
CY62512V
CYM74P436
192-Macrocell
62128 sram
7C1350
Triton P54C
palce16v8 programming guide
7C168A
intel 16k 8bit RAM chip
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2M X 32 Bits 72-Pin Flash SO-DIMM
Abstract: AN2131QC Triton P54C SO-DIMM 72pin 32bit 5V 2M AN2131-DK001 AN2131SC vhdl code for pipelined matrix multiplication VIC068A user guide parallel interface ts vhdl 7C037
Text: GO TO WEB MAIN INDEX 3URGXFW 6HOHFWRU *XLGH Static RAMs Organization/Density Overview Density X1 X4 X8 X9 X16 X18 X32 X36 7C148 7C149 7C150 4 Kb 16 Kb 7C167A 7C168A 7C128A 6116 64 Kb to 72 Kb 7C187 7C164 7C166 7C185 6264 7C182 256 Kb to 288 Kb 7C197 7C194
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7C148
7C149
7C150
7C167A
7C168A
7C128A
7C187
7C164
7C166
7C185
2M X 32 Bits 72-Pin Flash SO-DIMM
AN2131QC
Triton P54C
SO-DIMM 72pin 32bit 5V 2M
AN2131-DK001
AN2131SC
vhdl code for pipelined matrix multiplication
VIC068A user guide
parallel interface ts vhdl
7C037
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connecting diagram for ic 7432
Abstract: SIGNETICS 2656 PC4000 pin-out diagram for 7404 IC connecting diagram for ic 7404 8T97B IC 74LS14 for oscillator 7404 inverter pin configuration 7432 or gate ic SIGNETICS 7404 IC
Text: PRELIMINARY SPECIFICATION DESCRIPTION PC-4000 CABLE AND CONNECTOR ASSEMBLY The Signetics PC-4000 is an emulation of the Signetics 2656, a 40-pin NMOS-LSI sys tem memory interface chip. The PC-4000, in circuit board form, offers the engineer a system design aid. By designing with the
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PC-4000
40-pin
PC-4000,
128X8
8T28B
connecting diagram for ic 7432
SIGNETICS 2656
PC4000
pin-out diagram for 7404 IC
connecting diagram for ic 7404
8T97B
IC 74LS14 for oscillator
7404 inverter pin configuration
7432 or gate ic
SIGNETICS 7404 IC
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Q3500
Abstract: 300MHZ ECL100K ECL10K QM1600 QM1600S bcd counter using t flip flop diagram Vcc-1105
Text: Single PRELIMINARY ^ Copy .\ / •— “ * r 1 vi j I \ i U * * 1 11 ■ Z Z H / v Z Z Z z DEVICE SPECIFICATION QM1600S ECL/TTL LOGIC ARRAY WITH RAM FEATURES ECL LOGIC AND RAM COMBINED The Q M 1600S is con figu red to pro vid e up to 1600 e q u i valent ga tes of high spe ed ECL logic c o u p le d with 1280
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QM1600S
QM1600
B96tiHfiB
Q3500
300MHZ
ECL100K
ECL10K
bcd counter using t flip flop diagram
Vcc-1105
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