7206I Search Results

fifo buffer empty full flag error reset

Abstract: M672061 M67206E 7206I
Text: Temic M67206E S e m i c o n d u c t o r s 16 K x 9 High Speed CMOS Parallel FIFO Rad Tolerant Introduction The M67206E implements a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow.