Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    74 LS 00 LOGIC GATES Search Results

    74 LS 00 LOGIC GATES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TLP5702H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TLP5705H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    74 LS 00 LOGIC GATES Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    schmitt trigger 4093

    Abstract: D16841 4017 decade counter 1-of-10 dual differential line driver 88c30 HC 4093 4013 astable 16-LINE TO 4-LINE PRIORITY ENCODERS 7 segment 40192 88c29 4011 astable
    Text: Revised April 1999 Functional Selection Table 1999 Fairchild Semiconductor Corporation MS500117.prf www.fairchildsemi.com Functional Selection Table February 1998 Gates Function CROSSVOLT Device Leads FACT FAST FASTr ALS AS LS S TTL ABT VCX LCX LVX LVT LVQ AC ACT


    Original     		MS500117 schmitt trigger 4093 D16841 4017 decade counter 1-of-10 dual differential line driver 88c30 HC 4093 4013 astable 16-LINE TO 4-LINE PRIORITY ENCODERS 7 segment 40192 88c29 4011 astable PDF

    optocoupler NAND

    Abstract: 16-LINE TO 4-LINE PRIORITY ENCODERS octal optocoupler 3 bit magnitude comparator 4514 optocoupler 74xxx high speed logic to logic optocoupler
    Text: VHCT VHC LVXU LVCU LVCH X X X X X X X X X X X X X X STD X X X X X OL X LVX X X LVU X X LVT X LVQ X LVC X X X X X X X X X X X X X LV LCX X LS HCT HCU HC FCT F BCT ALS AL ACTQ ACT AC ABT xxx 74xxx Gates AND OR NAND NOR Quad 2-input 08 Quad 2-input o.c. 09 Triple 3-input


    Original     		74xxx 13-input UK315358 optocoupler NAND 16-LINE TO 4-LINE PRIORITY ENCODERS octal optocoupler 3 bit magnitude comparator 4514 optocoupler 74xxx high speed logic to logic optocoupler PDF

    ls 7400

    Abstract: 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay 74l500 74LS00 signetics 74ls00 tr tf 74LS00 function table
    Text: Signetìcs I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TY PE T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU P P LY C U R R E N T TO T A L 9ns 8m A 74LS00 9.5ns 1.6mA 74SOO 3ns 15m A 7400 ORDERING CODE C O M M E R C IA L RA NG E


    OCR Scan     		74LS00 74SOO N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul WF07570S ls 7400 7400 signetics TTL TTL LS 7400 7400 ls 7400 pin configuration TTL 7400 propagation delay 74l500 74LS00 signetics 74ls00 tr tf 74LS00 function table PDF

    TTL 7411

    Abstract: PIN CONFIGURATION 7410 74LS11 function table TTL LS 7411 74 LS 00 Logic Gates LS 7411 74LS10 pin configuration TTL 7410 TTL 7410 AND propagation delay PIN CONFIGURATION 74ls10
    Text: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates Logic Products Triple Three-Input NAND '10 , AND ('11) Gates Product Specification I TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7410 9ns 6mA 74LS10 10ns 1.2mA 74S10 3ns 12mA 7411 10ns 11mA


    OCR Scan     		74LS10 74S10 74LS11 74S11 N7410N, N74LS10N, N74S10N N7411N, N74LS11N, N74S11N TTL 7411 PIN CONFIGURATION 7410 74LS11 function table TTL LS 7411 74 LS 00 Logic Gates LS 7411 74LS10 pin configuration TTL 7410 TTL 7410 AND propagation delay PIN CONFIGURATION 74ls10 PDF

    74LS14 not gate

    Abstract: 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13
    Text: MOTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN 54LS /74LS 13 and S N 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into


    OCR Scan     		SN54LS/74LS13 SN54LS/74LS14 SN54/74LS13 SN54/74LS14 74LS14 not gate 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13 PDF

    TTL LS 7413

    Abstract: 74 LS 00 Logic Gates schmitt trigger 7413 ls 7413 n
    Text: 7413, LS13 Signetics Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic Products DESCRIPTION T h e '1 3 contains tw o 4-input N A N D gates which accept standard T T L input signals and provide standard T T L output levels. Th ey are capable of transforming


    OCR Scan     		OP01670S P016B0S TTL LS 7413 74 LS 00 Logic Gates schmitt trigger 7413 ls 7413 n PDF

    7402 TTL

    Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
    Text: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C


    OCR Scan     		74LS02 74S02 N7402N, N74LS02N, N74S02N N74LS02D, N74S02D 10Sul 10LSul WF07570S 7402 TTL 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor PDF

    ic 7451 pin configuration

    Abstract: 74 LS 00 Logic Gates
    Text: 7451, LS51, S51 Signetics Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2-Wide 3-Input, 2-Wide 2-Input AND-OR-lnvert Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7451 11ns 5.7mA 74LS51


    OCR Scan     		74LS51 74S51 N7451N, N74LS51N, N74S51N N74LS51D, N74S51D ic 7451 pin configuration 74 LS 00 Logic Gates PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LS260, S260 Signetics Gates Dual 5-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 74LS260 9ns 4 mA 74S260 4ns 22mA FUNCTION TABLE OUTPUT INPUTS A B c E Y H X X X X L X H X X X L X X H X X


    OCR Scan     		74LS260, 74LS260 74S260 SO-14 N74S260N, N74LS260N N74LS260D, N74S260D 74Srting 1N916, PDF

    74LS260

    Abstract: 74ls gate symbols 1N916 74LS 74S260 N74LS260D N74LS260N N74S260D N74S260N S260
    Text: Signetics 74LS260, S260 Gates Dual 5-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY 74LS260 9ns 4mA 74S260 4ns 22mA FUNCTION TABLE INPUTS OUTPUT A B C D E Y H X X X X L X H X X X L X X H X X L X X X H X L X X X X H L L L


    OCR Scan     		74LS260, 74LS260 74S260 N74S260N, N74LS260N SO-14 N74LS260D, N74S260D 1N916, 1N3064-, 74ls gate symbols 1N916 74LS N74LS260D N74LS260N N74S260D N74S260N S260 PDF

    TTL 7486

    Abstract: 74 LS 00 Logic Gates 7486 TTL 74LS86 TTL ls 7486 TTL 7486 AND propagation delay
    Text: Signetics I 7486, LS86, S8Ó Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7486 14ns 30mA 74LS86 10ns 6.1mA 74S86 7ns 50mA ORDERING CODE COMMERCIAL RANGE V cc = 5 V + 5 % ; T a = 0°C to +70°C


    OCR Scan     		74LS86 74S86 N7486N, N74LS86N, N74S86N N74LS86D, N74S86D 40/nAVm 15pFf TTL 7486 74 LS 00 Logic Gates 7486 TTL 74LS86 TTL ls 7486 TTL 7486 AND propagation delay PDF

    ic ttl 7432

    Abstract: specifications of IC 7432 supply voltage IC 7432 ls 7432 IC pin configuration ttl 7432 TTL 7432 OR propagation delay 7432 or gate ic 7432 ic 74LS32 SIGNETICS 7432 pin configuration
    Text: 7432, LS32, S32 Gates Signetics Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%: T a = 0°C to +70°C


    OCR Scan     		74LS32 74S32 N7432N, N74LS32N, N74S32N N74LS32D, N74S32D 40/iA ic ttl 7432 specifications of IC 7432 supply voltage IC 7432 ls 7432 IC pin configuration ttl 7432 TTL 7432 OR propagation delay 7432 or gate ic 7432 ic 74LS32 SIGNETICS 7432 pin configuration PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		GD54/74HC00, GD54/74HCT00 54/74LS00. PDF

    74HCoo

    Abstract: TTL 74HC00 74LS00 pinout pin diagram of 74ls00 74HC00 GD74HC00 logic symbol 74LS00 74hc00 and gates pin configuration logic symbol 74LS00 74LS00 gate diagram
    Text: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS 00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­


    OCR Scan     		GD54/74HC00, GD54/74HCT00 54/74LS00. GD74HCT00 GD54HCT00 74HCoo TTL 74HC00 74LS00 pinout pin diagram of 74ls00 74HC00 GD74HC00 logic symbol 74LS00 74hc00 and gates pin configuration logic symbol 74LS00 74LS00 gate diagram PDF

    7400 signetics

    Abstract: 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL 74LS00
    Text: Signetics I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE TY PIC A L PR O PAG ATIO N D ELAY 7400 74LS00 74S00 TY P IC A L S U P P LY C U R R E N T TO TAL 9ns 8m A 9.5 n s 1.6m A 3n s 15m A ORDERING CODE C O M M ER C IA L R A N G E


    OCR Scan     		74LS00 74S00 N7400N, N74LS00N, N74S00N N74LS00D, N74S00D 10Sul 10LSul 7400 signetics 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL PDF

    rs flip-flop IC 7400

    Abstract: 74ls105 TTL LS 7400 74LS series logic gates 7400 fan-out 74LS 3 input AND gate IC TTL 7400 schematic 74LS04 fan-out 74ls series logic family 90 watts inverter by 12v dc with 6 transisters
    Text: GENERAL DESCRIPTION ABSOLUTE MAXIMUM RATINGS Ovar operating free-air temper­ ature range unless otherwise noted Supply Voltage Vq c (See Note 1) Input Voltage V|n (See Note 1) Interemitter Voltage (See Note 2) Resistor Node Voltage, 54121, 74121 (See Note 1)


    OCR Scan     		PDF

    SN54ALS30A

    Abstract: SN54AS30 SN74ALS30A SN74AS30 Y315
    Text: SN74ALS30A. SN74AS30, SN54ALS30A, SN54AS30 8-INPUT POSITIVE-NAND GATES M A R CH 1 9 8 4 - R E V IS E D M A Y 1986 SN 54A LS30A . SN 54A S30 J PACKAG E SN 74A LS30A , SN 74AS30 . D OR N PACKAGE Package Options Include Plastic "S m a ll O utline" Packages, Ceram ic Chip Carriers,


    OCR Scan     		SN74ALS30A, SN74AS30, SN54ALS30A, SN54AS30 300-mil SN54ALS30A SN74ALS30A SN74AS30 Y315 PDF

    AL800

    Abstract: 74ALS00A SN74ASOO
    Text: SN74ALS00A, SN74AS00, SN54ALS00A, SN54AS00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES 02661, APRIL 1982 - REVISED MAY 1986 • • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN 6 4A LS 00 A , 8N S4 A S0 0


    OCR Scan     		SN74ALS00A, SN74AS00, SN54ALS00A, SN54AS00 300-mil LS00A 8N74ASOO SN74AS00 AL800 74ALS00A SN74ASOO PDF

    Untitled

    Abstract: No abstract text available
    Text: A D S -1 1 8 , A D S -1 1 8 A Low-Power, 12-Bit, 5MHz Sampling A/D Converters INNOVA TION a n d EXCELLENCE FEATURES • • • • • • • • • • 12-Bit resolution 5MHz minimum sampling rate Functionally complete Small 24-pin DDIP Requires only ±5V supplies


    OCR Scan     		12-Bit, 12-Bit 24-pin ADS-118 ADS-118A DS-0231B PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74HC09, GD54/74HCT09 QUAD 2-INPUT AND GATES WITH OPEN-DRAIN OUTPUTS General Description These devices are identical in pinout to the 54/74LS09. They contain four independent 2-Input AND gates. The open-drain outputs require pull-up resistors to perform correctly. With suitable pull-up


    OCR Scan     		GD54/74HC09, GD54/74HCT09 54/74LS09. PDF

    Untitled

    Abstract: No abstract text available
    Text: üiLattice ispLSI and pLSI 1048 i ! : : i i c o r p o ° a ntfon’0r High-Density Programmable Logic Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — — — — 96 I/O Pins, Ten Dedicated Inputs 288 Registers High-Speed Global Interconnects


    OCR Scan     		0212-8Q 1048-80LQ 120-Pin 1048-70LQ 1048-50LQ PDF

    Untitled

    Abstract: No abstract text available
    Text: Lattice' ispLSr and p L S t 1032 | Semiconductor I Corporation High-Density Programmable Logic Functional Block Diagram Features HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers


    OCR Scan     		Military/883 1032-90LJ 1032-90LT 1032-80LJ 1032-80LT 1032-60LJ 1032-60LT. 1032-90LJ. 84-Pin 00-Pin PDF

    ALS81

    Abstract: SN54ALS811 SN54AS811 SN74ALS811 SN74AS811 02837
    Text: S N 5 4 A LS 8 1 1, S N 74 A LS 8 11, SN 54AS811, SN 74AS811 QUADRUPLE 2 INPUT EXCLUSIVE NOR GATES WITH QPEN-COLLECTOR OUTPUTS 0 2 8 3 7 , MARCH Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs


    OCR Scan     		SN54ALS811, SN74ALS811, SN54AS811, SN74AS811 300-mil SN54AS811 SN74AS811 ALS81 SN54ALS811 SN74ALS811 02837 PDF

    w14b

    Abstract: DM74LS27N DM54LS27E DM54LS27J DM54LS27W DM74LS27 DM74LS27M E20A J14A M14A
    Text: S E M IC O N D U C T O R tm DM74LS27 Triple 3-Input NOR Gates General Description T h is d e v ic e c o n ta in s th re e in d e p e n d e n t g a te s e a c h o f w h ic h p e rfo rm s th e lo g ic N O R fu n c tio n . Connection Diagram Dual-ln-Line Package


    OCR Scan     		DM74LS27 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N DS006359 14-Lead w14b DM54LS27E DM54LS27J DM54LS27W DM74LS27 E20A J14A M14A PDF