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    onsemi 74LCX74BQX

    IC FF D-TYPE DUAL 1BIT 14DQFN
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    onsemi MC74LCX74DR2G

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    onsemi 74LCX74MTCX

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    onsemi MC74LCX74DTR2G

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    onsemi MC74LCX74DG

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    74LCX74 Datasheets (60)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LCX74 Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74 Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74 STMicroelectronics CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUT Original PDF
    74LCX74 STMicroelectronics Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs Original PDF
    74LCX74 STMicroelectronics Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs Original PDF
    74LCX74BQX Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs; Package: DQFN; No of Pins: 14; Container: Tape & Reel Original PDF
    74LCX74BQX Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74FT Toshiba Semiconductor and Storage Integrated Circuits (ICs) - Logic - Flip Flops - IC FF D-TYPE DUAL 1BIT 14TSSOP Original PDF
    74LCX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs; Package: SOIC; No of Pins: 14; Container: Rail Original PDF
    74LCX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74M National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74M STMicroelectronics Flip-Flop, Positive-Edge, D Flip-Flop, 2-Element, 1-Input, 14-SOP Original PDF
    74LCX74M STMicroelectronics CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUT Original PDF
    74LCX74M STMicroelectronics CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUT Original PDF
    74LCX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Scan PDF
    74LCX74M National Semiconductor Low Voltage Dual D-Type Positive Edge Triggered Flip-Flop with 5V Tolerant Inputs Scan PDF
    74LCX74M_NL Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF
    74LCX74MTC Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5 V Tolerant Inputs Original PDF
    74LCX74MTC Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Original PDF

    74LCX74 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    NLV17SZ74USG

    Abstract: *74lcx74
    Text: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V


    Original     		PDF NL17SZ74 74LCX74. NC7SZ74 NL17SZ74/D NLV17SZ74USG *74lcx74

    SZ74

    Abstract: NL17SZ74-D 74LCX74 A114 A115 C101 JESD22 NC7SZ74 NL17SZ74 NL17SZ74US
    Text: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V


    Original     		PDF NL17SZ74 NL17SZ74 74LCX74. NC7SZ74 NL17SZ74/D SZ74 NL17SZ74-D 74LCX74 A114 A115 C101 JESD22 NC7SZ74 NL17SZ74US

    74LCX74

    Abstract: 74LCX74BQX 74LCX74M 74LCX74MTC 74LCX74MTCX 74LCX74MX 74LCX74SJ LCX74 M14A M14D
    Text: Revised February 2005 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original     		PDF 74LCX74 LCX74 74LCX74 74LCX74BQX 74LCX74M 74LCX74MTC 74LCX74MTCX 74LCX74MX 74LCX74SJ M14A M14D

    LCX74

    Abstract: 74LCX74 74LCX74M 74LCX74MTC 74LCX74SJ M14A M14D MTC14
    Text: Revised January 2001 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original     		PDF 74LCX74 LCX74 74LCX74 74LCX74M 74LCX74MTC 74LCX74SJ M14A M14D MTC14

    Untitled

    Abstract: No abstract text available
    Text: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features General Description • 5V tolerant inputs ■ Latch-up performance exceeds JEDEC 78 conditions The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.


    Original     		PDF 74LCX74 LCX74

    SO-14

    Abstract: TSSOP-14 TSSOP14 SO14 SO-20
    Text: LOGIC CIRCUITS LOW VOLTAGE HIGH SPEED CMOS - LCX 74LCX SERIES RECOMMENDED OPERATING CONDITIONS Symbol VCC VI TA Parameter Supply Voltage Input Voltage Operating Temperature 74 Series Type 74LCX00 74LCX02 74LCX04 74LCX08 74LCX14 74LCX32 74LCX74 74LCX125 74LCX240


    Original     		PDF 74LCX 74LCX00 74LCX02 74LCX04 74LCX08 74LCX14 74LCX32 74LCX74 74LCX125 74LCX240 SO-14 TSSOP-14 TSSOP14 SO14 SO-20

    CCD CP marking code

    Abstract: No abstract text available
    Text: NL17SZ74 Product Preview Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. • • • • • • • http://onsemi.com Extremely High Speed: tPD x.x ns typical at VCC = 5 V


    Original     		PDF NL17SZ74 74LCX74. NC7SZ74 r14525 NL17SZ74/D CCD CP marking code

    74LCX74

    Abstract: 74LCX74M 74LCX74MTC 74LCX74SJ LCX74 M14A M14D MTC14
    Text: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original     		PDF 74LCX74 LCX74 74LCX74 74LCX74M 74LCX74MTC 74LCX74SJ M14A M14D MTC14

    Untitled

    Abstract: No abstract text available
    Text: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V


    Original     		PDF NL17SZ74 NL17SZ74 74LCX74. NC7SZ74 NL17SZ74/D

    Untitled

    Abstract: No abstract text available
    Text: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features General Description • 5V tolerant inputs ■ Latch-up performance exceeds JEDEC 78 conditions The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.


    Original     		PDF 74LCX74 LCX74 74LCX74

    NL17SZ74US

    Abstract: 74LCX74 A114 A115 C101 JESD22 NC7SZ74 NL17SZ74
    Text: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V


    Original     		PDF NL17SZ74 NL17SZ74 74LCX74. NC7SZ74 NL17SZ74/D NL17SZ74US 74LCX74 A114 A115 C101 JESD22 NC7SZ74

    74LCX74

    Abstract: 74LCX74BQX 74LCX74M 74LCX74MTC 74LCX74SJ LCX74 M14A M14D MTC14
    Text: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features General Description • 5V tolerant inputs ■ Latch-up performance exceeds JEDEC 78 conditions The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.


    Original     		PDF 74LCX74 LCX74 74LCX74 74LCX74BQX 74LCX74M 74LCX74MTC 74LCX74SJ M14A M14D MTC14

    74LCX74

    Abstract: LCX74 74LCX74M 74LCX74T TSSOP14
    Text: 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: fMAX = 150 MHz MAX. at VCC = 3V POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74LCX74 500mA LCX74 74LCX74 74LCX74M 74LCX74T TSSOP14

    M14A

    Abstract: M14D 74LCX74 74LCX74M 74LCX74MTC 74LCX74MTCX 74LCX74MX 74LCX74SJ 74LCX74SJX LCX74
    Text: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q Q outputs Information at the input is transferred to the outputs on the


    Original     		PDF 74LCX74 LCX74 M14A M14D 74LCX74 74LCX74M 74LCX74MTC 74LCX74MTCX 74LCX74MX 74LCX74SJ 74LCX74SJX

    Untitled

    Abstract: No abstract text available
    Text: NL17SZ74 Product Preview Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5 V


    Original     		PDF NL17SZ74 74LCX74. NC7SZ74 r14525 NL17SZ74/D

    Untitled

    Abstract: No abstract text available
    Text: Revised August 2004 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original     		PDF 74LCX74 LCX74 74LCX74

    LCX74

    Abstract: 74LCX74 74LCX74M 74LCX74MX 74LCX74SJ 74LCX74SJX
    Text: S e m i c o n d u c t o r LCX74 t* PRELIMINARY N a t i o n a l 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.


    OCR Scan     		PDF 74LCX74 LCX74 b501122 74LCX74 74LCX74M 74LCX74MX 74LCX74SJ 74LCX74SJX

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R -n 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type tlip-tlop w ith A synchronous C lear and S et inputs and com plem entary Q, Q outputs. In­


    OCR Scan     		PDF 74LCX74 LCX74

    LCX74

    Abstract: No abstract text available
    Text: National Semiconductor 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    OCR Scan     		PDF 74LCX74 LCX74

    74LCX74

    Abstract: No abstract text available
    Text: 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS . 5VTOLERANT INPUTS • HIGHSPEED: fM A X = 1 50 MHz MAX. at Vcc = 3V ■ POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE: M (Micro Package) |Io h | = Io l = 2 4 m A (MIN)


    OCR Scan     		PDF 74LCX74 74LCX74M 74LCX74T EXCEEDS500mA LCX74 TSS0P14 74LCX74

    74LCX74

    Abstract: No abstract text available
    Text: 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS PR ELIM IN ARY DATA . 5VTOLERANT INPUTS • HIGHSPEED: fM A X = 1 50 MHz MAX. at Vcc = 3V ■ POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE: M (Micro Package)


    OCR Scan     		PDF 74LCX74 74LCX74M 74LCX74T EXCEEDS500mA LCX74 74LCX74

    Untitled

    Abstract: No abstract text available
    Text: ^a rc h "f., jQ Q Q Revised April 1999 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features T h e LCX74 is a dual D -type flip-flop with Asynchronous C lear and Set inputs and com plem entary Q, Q outputs.


    OCR Scan     		PDF 74LCX74 LCX74

    Untitled

    Abstract: No abstract text available
    Text: Revised March 1999 S E M [CONDUCTOR TM 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.


    OCR Scan     		PDF 74LCX74 LCX74

    Untitled

    Abstract: No abstract text available
    Text: Marchi 1995 Revised March 1999 S E M I C O N D U C T O R TM 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features T h e LCX74 is a dual D-type flip-flop with Asynchronous C lear and S e t inputs and com plem entary Q, Q outputs.


    OCR Scan     		PDF 74LCX74 LCX74