IC AS SERIES

Contextual Info: 7-1 M ethod of Designating the TC74LCX / LVQ / LVX Series TC74LCX / LVQ / LVX series is as shown below. 74LVQ x x FN ELP • Type Classification — 74LCX = LCX series IC 74LVQ = LVQ series IC 74LVX = LVX series IC • Fu n ctio n -Same pin layout and

74LVQ11

Abstract: 74LVQ11M 74LVQ11MTR 74LVQ11TTR TSSOP14
Contextual Info: 74LVQ11 TRIPLE 3-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.7ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LVQ574

Abstract: 74LVQ574M 74LVQ574MTR 74LVQ574TTR
Contextual Info: 74LVQ574 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.5V (TYP.) at VCC = 3.3V

74LVQ240

Abstract: 74LVQ240M 74LVQ240MTR 74LVQ240TTR
Contextual Info: 74LVQ240 LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS INVERTED • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V

DT 7130 IC

Abstract: LC 7130 pin diagram of ic 4066 74HC4066 74LVQ4066 74LVQ4066M 74LVQ4066T LVQ4066 4066 IC circuit diagram
Contextual Info: 74LVQ4066 Q UAD BILATERAL SW ITCH P R E LIM IN A R Y DATA . . . HIGH SPEED: tpD = 0.4 ns TYP. at V cc = 3.3V COMPATIBLE WITH TTL LEVEL LOW POWER DISSIPATION: Ice = 1 mA (MAX.) at TA = 25 °C . LO W ”ON” RESISTANCE: R o n = 20i2 at Vcc = 3.3V, h/o < 1 mA

74HC4066 STMicroelectronics

Abstract: 74HC4066 74LVQ4066 74LVQ4066M 74LVQ4066MTR 74LVQ4066TTR TSSOP14 4066 SO14
Contextual Info: 74LVQ4066 QUAD BILATERAL SWITCH • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 0.4 ns TYP. at VCC = 3.3 V tPD = 0.1 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW "ON " LOW RESISTANCE RON = 14Ω at VCC = 3.3V , II/O < 1 mA

74LVQ08

Abstract: 74LVQ08M 74LVQ08MTR 74LVQ08TTR TSSOP14
Contextual Info: 74LVQ08 LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.6 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ125

Abstract: 74LVQ125SC 74LVQ125SJ LVQ125 M14A M14D
Contextual Info: 74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVQ125 contains four independent non-inverting buffers with 3-STATE outputs. n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and

Contextual Info: S E M IC O N D U C T O R 74LVQ00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVQOO contains four 2-input N AND gates. • Ideal for low pow er/low noise 3.3V applications ■ Guaranteed sim ultaneous sw itching noise level and dynam ic threshold perform ance

74LVQ00

Abstract: 74LVQ00M 74LVQ00T TSSOP14
Contextual Info: 74LVQ00  QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LVQ02

Abstract: 74LVQ02SC 74LVQ02SJ M14A M14D
Contextual Info: 74LVQ02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVQ02 contains four 2-input NOR gates. n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance

LVQ244

Abstract: 74LVQ244 74LVQ244M 74LVQ244T
Contextual Info: 74LVQ244 LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS NON-INVERTED • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE:

74LVQ574

Abstract: 74LVQ574M 74LVQ574T LVQ574
Contextual Info: 74LVQ574  OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180 MHz TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE:

74LVQ240

Abstract: 74LVQ240QSC 74LVQ240SC 74LVQ240SJ LVQ240 M20D MQA20
Contextual Info: 74LVQ240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The LVQ240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density.

74LVQ373

Abstract: 74LVQ373M 74LVQ373T LVQ373
Contextual Info: 74LVQ373  OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 6 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V

74LVQ158

Abstract: 74LVQ158M 74LVQ158MTR 74LVQ158TTR PO13H TSSOP16
Contextual Info: 74LVQ158 LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER INV. • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2V (TYP.) at VCC = 3.3V

ds0113

Contextual Info: R C H II_ D E M IC O N D U C T O R t 74LVQ157 Low Voltage Quad 2-Input Multiplexer General Description Features The LVQ157 is a high-speed quad 2-input m ultiplexer. Four bits of data from tw o sources can be selected using the com ­ mon S elect and Enable inputs. The fo u r outputs present the

Contextual Info: EM ICONDUCTQ R t 74LVQ08 Low Voltage Quad 2-Input AND Gate General Description Features The LVQ08 contains four, 2 -input AND gates. • ideal fo r low pow er/low noise 3.3V applications ■ G uaranteed sim ultaneous sw itching noise level and dynam ic threshold perform ance

Contextual Info: S E M IC O N D U C T O R Low 74LVQ245 L o w V o l t a g e O c t a l B i d i r e c t i o n a l T r a n s c e i v e r with Features The LVQ245 contains eight non-inverting bidirectional butt­ ers with 3-STATE outputs and is intended tor bus-oriented applications. Current sinking capability is 12 mA at both the A

Contextual Info: 74LVQ138 3 TO 8 LINE DECODER INVERTING . HIGH SPEED: tPD = 5.5 ns (TYP.) at Vcc = 3.3V • COMPATIBLE WITH TTL OUTPUT . LOW POWER DISSIPATION: Ice = 4 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.2 V (TYP.) at V c c = 3 .3 V ■ 75Q TRANSMISSION LINE DRIVING

Contextual Info: SG S-TH O M SO N 74LVQ157 M0 gl3 l[LI(3ra [S!]D(BS LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER . HIGHSPEED: tpD = 5 ns (TYP. at Vcc =3.3V . INPUT & OUTPUT TTL COMPATIBLE LEVELS . LOW POWER DISSIPATION: Ice = 4 |xA (MAX.) at TA = 25 °C . LOW NOISE: V o lp = 0.2V (TYP.) at V c c = 3.3V

Contextual Info: Æ T SGS-THOMSON D lsi S IILICTIs! iD©S 74LVQ125 QUAD BUS BUFFERS (3-STATE) . HIGH SPEED: tpD = 5 ns (TYP.) atVcc =3.3V . COMPATIBLEWITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 4 |xA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at V c c = 3.3V

Contextual Info: 74LVQ4066 QUAD BILATERAL SWITCH . HIGHSPEED: tPD = 0.4 ns TYP. at Vcc = 3.3 V tPD = 0.1 ns (TYP.)atVcc=5V . LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW ”ON” RESISTANCE: R on = 2.0Q at Vcc = 3.3V, li/o ^ 1mA R on = 12£l at Vcc = 5V, li/o < 1mA

Contextual Info: 74LVQ273 OCTAL D-TYPE FLIP FLOP WITH CLEAR . HIGHSPEED: fMAX = 150 MHz TYP. at Vcc =3.3V . COMPATIBLE WITH TTL OUTPUT • LOW POWER DISSIPATION: I c c = 4 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.4 V (TYP.) at V c c = 3.3V . 75Q TRANSMISSION LINE DRIVING