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    74AC11086DR Price and Stock

    Texas Instruments 74AC11086DR

    IC GATE XOR 4CH 2-INP 16SOIC
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    DigiKey 74AC11086DR Reel 2,500
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    Verical 74AC11086DR 5,000 216
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    Rochester Electronics 74AC11086DR 5,000 1
    • 1 $1.48
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    Rochester Electronics LLC 74AC11086DR

    IC GATE XOR 4CH 2-INP 16SOIC
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    DigiKey 74AC11086DR Bulk 195
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    Texas Instruments 74AC11086D

    Logic Gates Quad 2-Input
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    Mouser Electronics 74AC11086D 29
    • 1 $2.22
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    74AC11086DR Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AC11086DR Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Original PDF
    74AC11086DR Texas Instruments Quadruple 2-Input Exclusive-OR Gates Original PDF
    74AC11086DR Texas Instruments 74AC11086 - Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Original PDF
    74AC11086DRE4 Texas Instruments Quadruple 2-Input Exclusive-OR Gates Original PDF
    74AC11086DRE4 Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Original PDF
    74AC11086DRE4 Texas Instruments 74AC11086 - Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Original PDF
    74AC11086DRG4 Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Original PDF
    74AC11086DRG4 Texas Instruments 74AC11086 - Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85 Original PDF

    74AC11086DR Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil 4-Oct-2007 74AC11086DR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil 9-Jun-2007 74AC11086DR 74AC11086DR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    74AC11086

    Abstract: 74AC11086D 74AC11086DE4 74AC11086DR 74AC11086DRE4 74AC11086N
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil 74AC11086 74AC11086D 74AC11086DE4 74AC11086DR 74AC11086DRE4 74AC11086N

    74AC11086

    Abstract: 74AC11086D 74AC11086DE4 74AC11086DG4 74AC11086DR 74AC11086DRE4 74AC11086DRG4 74AC11086N 74AC11086NE4
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil 19-Mar-2008 74AC11086DR 74AC11086 74AC11086D 74AC11086DE4 74AC11086DG4 74AC11086DR 74AC11086DRE4 74AC11086DRG4 74AC11086N 74AC11086NE4

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil 12-Jan-2008 74AC11086DR

    74AC11086

    Abstract: 74AC11086D 74AC11086DR 74AC11086N
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil 74AC11086 74AC11086D 74AC11086DR 74AC11086N

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original     		PDF 74AC11086 SCAS081A 500-mA 300-mil