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    74ALS112A Search Results

    74ALS112A Result Highlights (3)

    Part ECAD Model Manufacturer Description Download Buy
    SN74ALS112ANSR Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70 Visit Texas Instruments Buy
    SN74ALS112AD Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Visit Texas Instruments
    SN74ALS112AN Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70 Visit Texas Instruments Buy
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    74ALS112A Price and Stock

    Texas Instruments SN74ALS112ANSR

    IC FF JK TYPE DUAL 1BIT 16SO
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    DigiKey SN74ALS112ANSR Digi-Reel 1,983 1
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    SN74ALS112ANSR Cut Tape 1,983 1
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    SN74ALS112ANSR Reel 2,000
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    Mouser Electronics SN74ALS112ANSR
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    Rochester Electronics SN74ALS112ANSR 11,644 1
    • 1 $0.8861
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    Texas Instruments SN74ALS112AD

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    DigiKey SN74ALS112AD Tube 240 1
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    Mouser Electronics SN74ALS112AD 223
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    Rochester Electronics SN74ALS112AD 15,126 1
    • 1 $0.7708
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    Texas Instruments SN74ALS112AN

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey SN74ALS112AN Tube 800
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    Mouser Electronics SN74ALS112AN 275
    • 1 $3.02
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    Bristol Electronics SN74ALS112AN 16,071 6
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    Rochester Electronics SN74ALS112AN 26,062 1
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    ComSIT USA SN74ALS112AN 126
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    Component Electronics, Inc SN74ALS112AN 605
    • 1 $0.77
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    • 100 $0.58
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    Rochester Electronics LLC SN74ALS112AN

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey SN74ALS112AN Bulk 331
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    Rochester Electronics LLC SN74ALS112AD

    SN74ALS112A DUAL J-K NEGATIVE-ED
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    DigiKey SN74ALS112AD Bulk 431
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    74ALS112A Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74ALS112A Philips Semiconductors Dual J-K negative edge-triggered flip-flop Original PDF
    74ALS112A Signetics Flip-Flop Original PDF
    74ALS112AD Philips Semiconductors Dual J-K negative edge-triggered flip-flop Original PDF
    74ALS112AN Philips Semiconductors Dual J-K negative edge-triggered flip-flop Original PDF

    74ALS112A Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    k0215

    Abstract: 74ALS112A 74ALS 74ALS112AD 74ALS112AN
    Text: INTEGRATED CIRCUITS 74ALS112A Dual J-K negative edge-triggered flip-flop Product specification IC05 Data Handbook Philips Semiconductors 1996 June 27 Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flop DESCRIPTION 74ALS112A


    Original
    74ALS112A 74ALS112A, k0215 74ALS112A 74ALS 74ALS112AD 74ALS112AN PDF

    STK411-230E

    Abstract: STK411-220E stk442-130 UPC2581V PAL005A FN1016 STRG6153 RSN313H25 STK407-070B MCZ3001D
    Text: R Serving The Electronic Industry Since 1982 Ordering at Dalbani is so easy Go to : www.dalbani.com Search & check stock Busque y revise nuestro inventario A Search Enter your Item number and click GO Entre el numero del producto y haga clicsobre GO The system will take you straight to the Item that you are looking for


    Original
    STVDST-01 CAT22 STK411-230E STK411-220E stk442-130 UPC2581V PAL005A FN1016 STRG6153 RSN313H25 STK407-070B MCZ3001D PDF

    Untitled

    Abstract: No abstract text available
    Text: Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flop DESCRIPTION 74ALS112A PIN CONFIGURATION The 74ALS112A, dual negative edge-triggered JK-type flip-flop features individual J, K, clock UFn , set (5D), and reset (RD) inputs, true (Qn) and complementary (Gn) outputs.


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    74ALS112A 74ALS112A, 74ALS 500ns PDF

    74ALS

    Abstract: 74ALS112A N74ALS112AD N74ALS112AN
    Text: 74ALS112A Flip-Flop Dual J-K Negative Edge-triggered Flip-Flop Preliminary Specification DESCRIPTION TYPE TYPICAL s u p p l y c u r r e n t TOTAL TYPICALfMAX The 74ALS112A, Dual Negative Edge50MHz 74ALS112A Triggered JK-Type Flip-Ftop.Jeatures indi­ vidual J, K, Clock (CPn), Set (SD) and Reset U H U C n in u i n r u n n i n i i w . .


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    74ALS112A 74ALS112A, 74ALS 500ns 74ALS112A N74ALS112AD N74ALS112AN PDF

    Untitled

    Abstract: No abstract text available
    Text: M IT SU BI S HI O G TL LOGIC} TI ]>e | b E4 c1äS7 0D12377 S jp MITSUBISHI ALSTTLs M 6249827 MITSUBISHI I 7 4 A L S 1 1 2 A P <DGTL LOGIC 91D 12377 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP-FLO P W IT H SET AND RESET - - DESCRIPTION The M 74ALS112AP is a semiconductor integrated circuit


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    0D12377 74ALS112AP 16P2P 16-PIN 150mil T-90-20 20P2V 300mil PDF

    Untitled

    Abstract: No abstract text available
    Text: 74ALS112A, SN54ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FUP-FLOPS WITH CLEAR AND PRESET 02661, A PRIL 1982 - REVISED MAY 1986 • Fully Buffered to Offer Maximum Isolation from External Disturbance • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers,


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    SN74ALS112A, SN54ALS112A 300-mll LS112A L8112A LS112A PDF

    SN54ALS112A

    Abstract: SN74 SN74ALS112A
    Text: SN54ALS112A, 74ALS112A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , A P R IL 1 9 8 2 — R E V IS E D M A Y 1 9 8 6 • Fully Buffered to Offer Maxim um Isolation from External Disturbance • Package Options Include Plastic "Sm all


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    SN54ALS112A, SN74ALS112A D2661, 300-mil ALS112A SN54ALS112A SN74ALS112A SN74 PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 74ALS1035P TËJ MITSUB ISH I {DGTL LOGIC} Q012732 G | HEX NONINVERTING BUFFER W ITH OPEN COLLECTOR OUTPUT / DESCRIPTION PIN CONFIGURATION TOP VIEW ” T h e M 7 4 A L S 1 0 3 5 P is a s e m ic o n d u c to r in te g ra te d c ir­ c u it c o n s is tin g o f six n o n -inverting b u ffe rs w ith open


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    74ALS1035P Q012732 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mll PDF

    ci la 7610

    Abstract: No abstract text available
    Text: c +e MITSUBISHI ALSTTLs . op,00° M 74A L S 620A -1P v ie N v t ^s ^ - 3 _ OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI CDGTL LOGIC) DESCRIPTION The M74ALS6Í20A-1P is a semiconductor integrated cir­ cuit consisting of eight bus transm itter/receiver circuits


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    M74ALS6 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil ci la 7610 PDF

    ci la 7610

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 7 4 A LS 6 5 1 P 7 -52-3/ OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 91 D 12674 (DGTL LOGIC ) DESCRIPTION The M74ALS651P is a semiconductor integrated circuit consisting of eight bus transceiver/registers with 3-state


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    M74ALS651P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil ci la 7610 PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI íDGTL LOGICI TI DEI't.E4*1ñ27 D0ia3flD S MITSUBISHI ALSTTLs M 624 9 82 7 M IT S U B IS H I DG TL L O G IC 7 4 A 91D L S 1 1 3 A P 12380 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP -FLO P W IT H SET T -H (* -o 7 -o y DESCRIPTION PIN CONFIGURATION (TOP VIEW)


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    74ALS113AP 16P2P 16-PIN 150mil T-90-20 20P2V 300mil PDF

    m74als191p

    Abstract: No abstract text available
    Text: ÍDGTL LOGIC} 91D TI De | 12446 b241fl27 □ 0 1 2 4 4b ñ r D MITSUBISHI ALSTTLs M 74A LS191P SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER W ITH MODE CONTROL • 7 ^ V ' 5 ' ' ^ >3 DESCRIPTION - o 7 PIN CONFIGURATION TOP VIEW Th e M 7 4 A L S 1 9 1 P is a s e m ic o n d u c to r in te g ra te d c irc u it


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    b241fl27 LS191P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil m74als191p PDF

    74ALS640

    Abstract: No abstract text available
    Text: MITSUBISHI -CDGTL LOGIC} dT | ba^flS? D O i a k b B 4 M ITSUBISHI A L ST T Ls sc* -s s 5 " : . M 7 4 A LS6 4 7 P ,o.9B OCTAL BUS TR A N SC EIV ER /R EG IST ER WITH OPEN COLLECTOR OUTPUT NONINVERTED 6249827 MITSUBISHI CDGTL LOGTC) DESCRIPTION The M74ALS647P is a semiconductor integrated circuit


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    M74ALS647P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil 74ALS640 PDF

    M74ALS374P

    Abstract: dd127 4d40t
    Text: MITSUBISHI iDGTL LOGIC} TI 1mF | bSLHÖ27 D0155E5 5 MITSUBISHI ALSTTLs ,oC* M 74A LS374P OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED 6249827 MITSUBISHI 9 1D 12525 (DGTL LOGIC) DESCRIPTION D PIN CONFIGURATION (TOP VIEW) T h e M 7 4 A L S 3 7 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it


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    D0155E5 LS374P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil M74ALS374P dd127 4d40t PDF

    74ALS131

    Abstract: 74als245a m74als138p 74als169b 74ALS193D
    Text: M IT S U B IS H I -CDGTL L O G I C } TI 0 F | b E 4 ciflE 7 0 D lE 3 flt b |~ _ 6249827 MITSUBISHI I M IT SU B ISH I ALSTTLs M 74ALS131P <DG T L LO GI C 91D 12386 D 3 -L IN E TO 8 -L IN E D E C O D E R /D E M U L T IP L E X E R W IT H A D D R E S S R E G IS T E R


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    74ALS131P M74ALS131P 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mll 74ALS131 74als245a m74als138p 74als169b 74ALS193D PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs M 7 4 A L S 1 0 0 2 À P a D eE| tk24=]aS7 0015712 > | MITSUBISHI IDGTL LOGIC} 11 QUADRUPLE 2-IN P U T PO SITIVE NOR BUFFER 7 ^ V 3 - /S DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M74ALS1002AP is a semiconductor integrated cir­ cuit consisting of four 2-input positive-logic NOR buffer


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    M74ALS1002AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil PDF

    J 5027 R

    Abstract: BEM 6K
    Text: MIT SUBISH I íDGTL L O G I C } T I d ËT| ^5^027 ~JZ.SZt~3/ G0127SS □ MITSUBISHI ALSTTLs M 74A L S 1621A P I 62 49 8 2 7 M I T S U B I S H T T D G T L T o G r ^ ~ 910 12755 D OCTAL BUS TRANSCEIVER W ITH OPEN COLLECTOR OUTPUT NONINVERTED) DESCRIPTION


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    G0127SS M74ALS1621AP 74ALS621AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil J 5027 R BEM 6K PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI -CDGTL L O G I O TI DE | bSMTfla? 001E4b4 □ M IT SU B ISH I ALSTTLs M74ALS241AP 6249827 MITSUBISHI DGTL LOGIC 91D 12464 D O CTAL B U F F E R /L IN E D R IV E R W IT H 3 -ST A T E O U T PU T (N O N IN V E R T E D ) DESCR IPTIO N The M74ALS241AP is a semiconductor integrated circuit


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    001E4b4 M74ALS241AP M74ALS241AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI ALSTTLs & M74ALS169BP T ' - v ’S '- J J - o SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER 6249827 MITSUBISHI DG TL LOGIC DESCRIPTION Th e M 74A L S 169 B P is a sem iconductor integrated circuit of a synchronous p resettable u p /d o w n


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    M74ALS169BP 16P2P 16-PIN 150mil T-90-20 20P2V 300mil PDF

    74als561

    Abstract: No abstract text available
    Text: MITSUBISHI íDGTL LOGIC} "DÌI bSMTñE? 00123ki7 5 TI W~ M IT S U B IS H I* !L. S T T L s M74ALS38AP 91D 12367 D 6249827 MITSUBISHI DGTL LOGIC QUADRUPLE 2 -IN P U T P O S ITIV E NAND BUFFER W IT H OPEN COLLECTOR OU TPUT T - - V 3 - / S DESCRIPTION PIN CONFIGURATION (TOP VIEW)


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    00123ki7 M74ALS38AP 150mil 16P2P 16-PIN T-90-20 20P2V 300mll 74als561 PDF

    Untitled

    Abstract: No abstract text available
    Text: "d ë J M ITS UBISHI -CDGTL L O G I O bEMTfla? ooiBS'in a S^Ls MITSUBISHI ALSTTLs M 74ALS133P r _ 6249827 MITSUBISHI - y j - / r SINGLE 13-IN PU T POSITIVE NAND GATE DGTL LOGIC DESCRIPTION Th e M 7 4A LS 133P is a sem iconductor integrated circuit


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    74ALS133P 13-IN 13-input 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil PDF

    m74als

    Abstract: M74ALS109AP 74ALS640
    Text: M IT S U B IS H I {D G T l T o G IcT ^ I b H 1 SS? M 6249827 MITSUBISHI 7 4 A CDGTL LOGIC 91D J STTLs L S 1 0 9 A 12 37 4 P D DUAL J-R POSITIVE EDGE-TRIGGERED FLIP-FLOP W ITH SET AND RESET T -V & -0 7 - Ô ? DESCRIPTION PIN CONFIGURATION TOP VIEW) The M74ALS109AP is a semiconductor Integrated circuit


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    M74ALS109AP 16P2P 16-PIN 150mil T-90-20 20P2V 20-PIN 300mil m74als 74ALS640 PDF

    gt 568

    Abstract: m74als568ap m74als568a
    Text: MITSUBISHI -CDGTL L O G I O de! TI tsMiaa? QGiasai 4 |~~ M IT S U B IS H I ALSTTLs ~ J- M 74A LS 568A P S Y N C H R O N O U S P R E S E T T A B L E U P /O O W N D EC A D E C O U N TE R _ W IT H 3 -S T A T E O U T P U T 1H249827 MITSIJBISHI


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    1H249827 16P2P 150mil 20P2V 300mil E--07 gt 568 m74als568ap m74als568a PDF

    M74ALS193P

    Abstract: TF2N 154027
    Text: MITSUBISHI I -CDGTL L O G I C ? =11 De | bEMTñE? □□12454 ñ T~ ^ MITSUBISHI ALSTTLs . M74ALS193P SYNCHRONOUS PRESETTABLE U P /D O W N 4 -B IT B IN A R Y COUNTER 6248827 MITSUBISHI ÍDGTL LOGIC DESCRIPTION The M74ALS193P is a semiconductor integrated circuit


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    M74ALS193P M74ALS193P 16P2P 16-PIN 150mil T-90-20 20P2V 300mil TF2N 154027 PDF