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Nexperia 74AUP1G332GF,132 OR Gate 1-Element 3-IN CMOS 6-Pin XSON T/R - Tape and Reel (Alt: 74AUP1G332GF,132)
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Avnet Americas	74AUP1G332GF,132	Reel			5,000	1 - 10 - 100 - 1000 - 10000 -	Get Quote

74AUP1G332GF Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
74AUP1G332GF		NXP Semiconductors	74AUP1G332 - IC AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate		Original	PDF
74AUP1G332GF		NXP Semiconductors	Low-power 3-input OR gate		Original	PDF
74AUP1G332GF		Philips Semiconductors	Low-power 3-input OR gate		Original	PDF
74AUP1G332GF,132		NXP Semiconductors	74AUP1G332 - IC AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate		Original	PDF
74AUP1G332GF,132		NXP Semiconductors	Low-power 3-input OR gate; Package: SOT891 (XSON6); Container: Tape reel smd		Original	PDF

74AUP1G332GF Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
3-input orgate Abstract: SOT-120 74AUP1G332 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW Text: 74AUP1G332 Low-power 3-input OR-gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	PDF	74AUP1G332 74AUP1G332 3-input orgate SOT-120 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW
74AUP1G332 Abstract: 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114-C Text: 74AUP1G332 Low-power 3-input OR gate Rev. 01.00 — 27 February 2006 Preliminary data sheet 1. General description The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	PDF	74AUP1G332 74AUP1G332 74AUP 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114-C
74AUP1G332 Abstract: No abstract text available Text: 74AUP1G332 Low-power 3-input OR-gate Rev. 5 — 4 July 2012 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	PDF	74AUP1G332 74AUP1G332
Untitled Abstract: No abstract text available Text: 74AUP1G332 Low-power 3-input OR gate Rev. 01 — 13 November 2006 Product data sheet 1. General description The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	PDF	74AUP1G332 74AUP1G332
74AUP1G332 Abstract: 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114E Text: 74AUP1G332 Low-power 3-input OR gate Rev. 02 — 29 February 2008 Product data sheet 1. General description The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall	Original	PDF	74AUP1G332 74AUP1G332 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114E
Untitled Abstract: No abstract text available Text: 74AUP1G332 Low-power 3-input OR-gate Rev. 4 — 25 November 2011 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.	Original	PDF	74AUP1G332 74AUP1G332