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    74AUP1G332GF Price and Stock

    Nexperia 74AUP1G332GF,132

    OR Gate, Single, 3 Input, 6 Pins, XSON, 74AUP1G332 - Tape and Reel (Alt: 74AUP1G332GF,132)
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    Avnet Americas 74AUP1G332GF,132 Reel 5,000
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    Vyrian 74AUP1G332GF,132 303
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    NXP Semiconductors 74AUP1G332GF-H

    OR GATE; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 6; Package Code: SON; Package Shape: RECTANGULAR;
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    Vyrian 74AUP1G332GF-H 99
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    74AUP1G332GF Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP1G332GF NXP Semiconductors 74AUP1G332 - IC AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF
    74AUP1G332GF NXP Semiconductors Low-power 3-input OR gate Original PDF
    74AUP1G332GF Philips Semiconductors Low-power 3-input OR gate Original PDF
    74AUP1G332GF,132 NXP Semiconductors 74AUP1G332 - IC AUP/ULP/V SERIES, 3-INPUT OR GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF
    74AUP1G332GF,132 NXP Semiconductors Low-power 3-input OR gate; Package: SOT891 (XSON6); Container: Tape reel smd Original PDF

    74AUP1G332GF Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    3-input orgate

    Abstract: SOT-120 74AUP1G332 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW
    Text: 74AUP1G332 Low-power 3-input OR-gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


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    74AUP1G332 74AUP1G332 3-input orgate SOT-120 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW PDF

    74AUP1G332

    Abstract: 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114-C
    Text: 74AUP1G332 Low-power 3-input OR gate Rev. 01.00 — 27 February 2006 Preliminary data sheet 1. General description The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


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    74AUP1G332 74AUP1G332 74AUP 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114-C PDF

    74AUP1G332

    Abstract: No abstract text available
    Text: 74AUP1G332 Low-power 3-input OR-gate Rev. 5 — 4 July 2012 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP1G332 74AUP1G332 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G332 Low-power 3-input OR gate Rev. 01 — 13 November 2006 Product data sheet 1. General description The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    74AUP1G332 74AUP1G332 PDF

    74AUP1G332

    Abstract: 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114E
    Text: 74AUP1G332 Low-power 3-input OR gate Rev. 02 — 29 February 2008 Product data sheet 1. General description The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    74AUP1G332 74AUP1G332 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW JESD22-A114E PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G332 Low-power 3-input OR-gate Rev. 4 — 25 November 2011 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP1G332 74AUP1G332 PDF