74hctls
Abstract: No abstract text available
Text: Zytrex_ sags12 Triple 3-Input NAND Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin*out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input NAND
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ZX54HCTLS
ZX74HCTLS
54/74LS
74HCTLS:
54HCTLS:
74hctls
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74HCTLS
Abstract: No abstract text available
Text: Zytrex ZXS4HCTLS ZX74HCTLS February 1985 11 Triple 3-Input AND Gates O BJECTIVE S P E C IF IC A TIO N S Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input AND
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54/74LS
74HCTLS:
54HCTLS:
ZX54HCTLS
ZX74HCTLS
74HCTLS
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74LS58
Abstract: 74HCT58 GD74HC58 54/74LS58 74HC GD54HC58
Text: GD54/74HC58, GD54/74HCT58 DUAL AND-OR GATES General Description These devices are identical in pinout to the 54/74LS 58. They contain one 2-wide 2-input & one 2-wide 3-input AND-OR gates. These devices are characterized for operation over wide temperature ranges to meet industry and military
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GD54/74HC58,
GD54/74HCT58
54/74LS58.
GD74HCT58
GD54HCT58
74LS58
74HCT58
GD74HC58
54/74LS58
74HC
GD54HC58
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kss4h
Abstract: No abstract text available
Text: SAHSÜNb stîlICONDUCTOR INC D5 KS54HCTLS 11 KS74HCTLS # l DE I TTtMlMS 000^2^5 3 Triple 3-Input AND Gates - T -4 3 -» FEATURES DESCRIPTION • Function, pinout, speed and drive comp|t!billty with 54/74LS logic family • Low power consumption characteristic of C M O S
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KS54HCTLS
KS74HCTLS
54/74LS
KS74HCTLS:
KS54HCTLS:
300-mil
7Tb414S
90-XO
14-Pin
kss4h
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Untitled
Abstract: No abstract text available
Text: SAMSUNG SEMICONDUCTOR INC OE KS74HCTLS ^ 3 D E I 71fc.4142 D 0 D L 3 S 4 0 J~. 13-Input NAND^Gates FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with S4/74LS logic family • Low power consumption characteristic of CMOS • High-Drive-Current outputs:
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KS74HCTLS
13-Input
S4/74LS
KS74HCTLS:
KS54HCTLS:
300-mil
7Tb414S
90-XO
14-Pin
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IC TTL 7438
Abstract: 74S38
Text: SN5438, SN54LS38, SN54S38, SN7438, SN 74LS 3 8 , SN74S38 Q U A D R U PLE 2 INPUT POSITIVE IUAND BUFFERS WITH OPEN C OLLECTOR OU TPU TS DECEMBER 1 9 8 3 Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic
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SN5438,
SN54LS38,
SN54S38,
SN7438,
SN74S38
IC TTL 7438
74S38
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PDF
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Untitled
Abstract: No abstract text available
Text: SAMSUNG SEMICONDUCTOR I N C QS DEÌ KS54HCTLS 0 4 KS74HCTLS Ä 1 7^4145 -V - OQOtiBQl O ^ >. : - X . - 4 3 - I Dual 4-Input AND Gates FEATU RES DESCRIPTION • Function, pin-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS
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KS54HCTLS
KS74HCTLS
54/74LS
7Tb414S
90-XO
14-Pin
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hctls86
Abstract: No abstract text available
Text: SAMSUNG SEMICONDUCTOR INC OB DE^ 7 H m M a K S S 4 H C T L S O ^ . KS74HCTLS 000^330 7 '7_" - ^ 3 -v2 Quad 2-Input Exclusive-OR Gates FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with 54/74LS logic family
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KS74HCTLS
54/74LS
KS74HCTLS:
KS54HCTLS:
300-mil
7Tb414S
90-XO
14-Pin
hctls86
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M74LS10P
Abstract: mitsubishi air conditioning 20-PIN 74LS10P
Text: MITSUBISHI LSTTLs M 74LS10P T R IP L E 3 -IN P U T P O S IT IV E NAND GATES DESCRIPTION The M 74LS 10P is a semiconductor integrated circuit containing three triple-input positive N A N D and negative N O R gates. FEATURES • High breakdown input voltage V | ^ 15 V
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M74LS10P
b2LHfl27
0013Sbl
14-PIN
16-PIN
20-PIN
M74LS10P
mitsubishi air conditioning
74LS10P
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74LS10P
Abstract: M74LS10P
Text: M IT S U B IS H I L S T T L s M 74LS10P TRIPLE 3-IN P U T POSITIVE NAND GATES DESCRIPTION The M 74LS 10P is a semiconductor integrated circuit containing three triple-input positive N A N D and negative N O R gates. FEATURES • High breakdown input voltage V | ^ 15 V
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74LS10P
500ns,
b2LHfl27
0013Sbl
14-PIN
16-PIN
20-PIN
74LS10P
M74LS10P
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PDF
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74HCTLS
Abstract: el 519
Text: Zyfi vx ZXS4HCTLS Ë U ZX74HCTLS Ê February 1985 T r ip le 3 -In p u t N A N D E G a te ^ OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input NAND
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ZX74HCTLS
54/74LS
74HCTLS:
54HCTLS:
74HCTLS
el 519
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taig
Abstract: No abstract text available
Text: SAMSUNG SE MIC O N D U C T OR INC OB 5T| 7^4142 KS54HCTLS O Q KS74HCTLS “ 00Qb303 4 Dual 4-Input NAND Gates with Open-Drain Outputs -f - 4 3 - I -1 FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family
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00Qb303
KS54HCTLS
KS74HCTLS
7Tb414S
90-XO
14-Pin
taig
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PDF
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D73-Y
Abstract: D73y ic 74145
Text: SAMSUNG SEM IC O N D U C T OR INC 05 DEI 7^4145 . KS54HCTLS O O KS74HCTLS ~ 000^301 S T -4 3 -a i Quad 2-Input OR Gates FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS
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KS54HCTLS
KS74HCTLS
54/74LS
KS74HCTLS:
KS54HCTLS:
300-mil
7Tb414S
90-XO
14-Pin
D73-Y
D73y
ic 74145
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Untitled
Abstract: No abstract text available
Text: SAMSUNG S E M I CO ND UCTOR INC 03 DE | 7 ^ 4 1 4 2 D00L5fl0 7 | Quad 2-Input NAND Gates with Open-Drain Outputs KS54HCTLS M KS74HCTLS w T " H 3 -V I FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS
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D00L5fl0
KS54HCTLS
KS74HCTLS
54/74LS
KS74HCTLS:
KS54HCTLS:
300-mil
7Tb414S
90-XO
14-Pin
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semiconductor449
Abstract: No abstract text available
Text: S A M S U N G ^ S E M I C O N D U C T O R INC OH K S ^ d H fìT I S O T ' D È I 7 U 4 1 4 5 D 0 0 b 3 Q S Û J"" ^ " KS74HCTLS " T " 4 3 'Ä I Triple 3-Input NOR Gates FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with S4/74LS logic family
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KS74HCTLS
S4/74LS
KS74HCTLS:
KS54HCTLS:
300-milcc2
7Tb414S
90-XO
14-Pin
semiconductor449
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PDF
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Untitled
Abstract: No abstract text available
Text: H D 74LS 54 •4 -w ¡d e 2-¡nput, 3-input AND-OR-INVERT Gates IP IN ARRANGEMENT IC IR C U IT SCHEM ATIC N o te The schem atic w ith in th e dashed lin e is in clu de d th e h a lf in p u t te rm in a ls o f H D 7 4 L S 5 4 . •ELECTRICAL CHARACTERISTICS Ta= - 2 0 - +75°C )
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400//A
T-90-10
74LSOO
ib203
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74ls Logic Family Specifications
Abstract: 74LS 74LS136 74Ls signetics 74LS 3 input AND gate
Text: 74LS136 Signetics Gate Quad Two-Input Exclusive-OR Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 18ns 6.1mA 74LS136 ORDERING CODE FUNCTION TABLE INPUTS OUTPUT A B Y L L H H L H L H
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74LS136
N74LS136N
10LSul
20/jtA
WF07570S
F07380S
74ls Logic Family Specifications
74LS
74LS136
74Ls signetics
74LS 3 input AND gate
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TTL 74ls54
Abstract: 74ls Logic Family Specifications 74LS54 74LS
Text: 74LS54 Gate S ignetics Four-Wide Two- & Three-Input AND-OR-lnvert Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 12ns 0.9mA 74LS54 ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T A = 0°C to +70°C
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74LS54
74LS54
N74LS54N
N74LS54D
F07S70S
TTL 74ls54
74ls Logic Family Specifications
74LS
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LT 5216
Abstract: ic 74132 LT 5212 74132 LT 5215 f 74132 74132 data LS132 ls132 equivalent TTL 74LS 00
Text: 74132, LS132 Signetics Schmitt Triggers Quad 2-Input NAND Schmitt Trigger Product Specification Logic Products The '132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming
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LS132
OP01670S
LT 5216
ic 74132
LT 5212
74132
LT 5215
f 74132
74132 data
LS132
ls132 equivalent
TTL 74LS 00
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PDF
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74LS266 pin configuration
Abstract: TTL 74LS266 74ls Logic Family Specifications 74LS 74Ls signetics
Text: 74LS266 Signetics Gate Quad 2-Input Exclusive-NOR Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 18ns 8mA 74LS266 FUNCTION TABLE INPUTS ORDERING CODE OUTPUT A B Y L L H H L H L H H L
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74LS266
N74LS266N
10LSul
500ns
500ns
74LS266 pin configuration
TTL 74LS266
74ls Logic Family Specifications
74LS
74Ls signetics
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PDF
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LM 7410
Abstract: No abstract text available
Text: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates Logic Products Triple Three-Input NAND ’10 , AND ('11) Gates Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7410 9ns 6mA 74LS10 10ns 1.2mA 74S10 3ns 12mA 7411 10ns
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74LS10
74S10
74LS11
74S11
N7410N,
N74LS10N,
N74S10N
N7411N,
N74LS11N,
N74S11N
LM 7410
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PIN CONFIGURATION OF 74LS30
Abstract: TTL 7430 7430 pin configuration 7430 7430 Eight-Input NAND Gate IC 7430 74ls30 equivalent
Text: Signetics | 7430, LS30 Gates Eight-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7430 11ns 2mA 74LS30 11ns 0.5mA ORDERING CODE COMMERCIAL RANGE V CC - 5V ±5% ; T A = 0°C to +70°C PACKAGES
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74LS30
N7430N,
N74LS30N
N74LS30D
PIN CONFIGURATION OF 74LS30
TTL 7430
7430 pin configuration
7430
7430 Eight-Input NAND Gate
IC 7430
74ls30 equivalent
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PDF
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TTL 7410
Abstract: 74LS11 function table 74LS10 pin configuration TTL 7410 AND propagation delay 7411 signetics
Text: Signetics I 7410, 7411, LS10, LS11 S10, S11 Gates Logic Products • Triple Three-Input NAND '10 , AND ('11) Gates Product Specification TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7410 9ns 6mA 74LS10 10ns 1.2mA 74S1Û 3ns 12mA 7411 10ns
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74LS10
74LS11
74S11
N7410N,
N74LS10N,
N74S10N
N7411N,
N74LS11N,
N74S11N
N74LS10D,
TTL 7410
74LS11 function table
74LS10 pin configuration
TTL 7410 AND propagation delay
7411 signetics
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PDF
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Untitled
Abstract: No abstract text available
Text: Signetics 74LS266 Gate Quad 2-Input Exclusive-NOR Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 18ns 8mA 74LS266 FUNCTION TABLE INPUTS ORDERING CODE OUTPUT A B Y L L H H L H L H H L
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74LS266
74LS266
N74LS266N
10LSul
20/iA
500ns
500ns
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