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    74LV10PW Search Results

    74LV10PW Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LV10PW Philips Semiconductors Triple 3-Input NAND Gate Original PDF
    74LV10PW Philips Semiconductors Triple 3-input NAND gate Scan PDF
    74LV10PW Philips Semiconductors Triple 3-input NAND gate Scan PDF
    74LV10PW Philips Semiconductors Triple 3-input NAND gate Scan PDF
    74LV10PW Philips Semiconductors Triple 3-input NAND gate Scan PDF
    74LV10PWDH Philips Semiconductors Triple 3-input NAND gate Original PDF
    74LV10PWDH Philips Semiconductors Triple 3-input NAND gate Scan PDF
    74LV10PWDH Philips Semiconductors Triple 3-input NAND gate Scan PDF

    74LV10PW Datasheets Context Search

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    74LV10

    Abstract: 74LV10PW
    Text: INTEGRATED CIRCUITS 74LV10 Triple 3-input NAND gate Product specification Supersedes data of 1997 Feb 12 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 Philips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION


    Original     		PDF 74LV10 74LV10 74HC/HCT10. 74LV10PW

    74LV10

    Abstract: 74LV10PW
    Text: Philips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6 V The 74LV10 is a l°w -voltage Si-gate CMOS device and is pin and function com patible with 74H C /H C T10.


    OCR Scan     		PDF 74LV10 SQT402-1 MO-153 74LV10 74LV10PW

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS 74LV10 Triple 3-input NAND gate Product specification Supersedes data of 1997 Feb 12 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 PHILIPS Philips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION


    OCR Scan     		PDF 74LV10 74LV10 74HC/HCT10.

    74LV10

    Abstract: 74LV10PW
    Text: Philips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • W ide operating voltage 1 0 to 5 5 V The 74LV10 is a iow-voitage Si-gate CMOS device and is pin and function com patible with 74H C /H C T10. • Optim ized for Low Voltage applications: 1.0 to 3.6 V


    OCR Scan     		PDF 74LV10 SQT402-1 MO-153 74LV10 74LV10PW

    74LV10

    Abstract: 74LV10D 74LV10DB 74LV10PW
    Text: Product Specification Philips Semiconductors 74LV10 Triple 3-input NAND gate QUICK REFERENCE DATA FEATURES GND = 0 V; Tamb = 25°C; tr = t, < 2.5 ns • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and


    OCR Scan     		PDF 74LV10 74LV10 74HC/HCT10. 7110flSb 74LV10D 74LV10DB 74LV10PW

    Untitled

    Abstract: No abstract text available
    Text: Phifips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6 V The 74L.V10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10.


    OCR Scan     		PDF 74LV10 74HC/HCT10. 74LV10

    DIL 14 M

    Abstract: 74LV10 74LV10D 74LV10DB 74LV10N 74LV10PW
    Text: Philips Semiconductors Product Specification Triple 3-input NAND gate FEATURES • • • • • • 74LV10 QUICK REFERENCE DATA GND = 0 V; T „ * = 25°C; t, = t, S 2.5 ns Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and


    OCR Scan     		PDF 74LV10 74LV10 74HC/HCT10. 711Dfl2fc. DIL 14 M 74LV10D 74LV10DB 74LV10N 74LV10PW