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    74LV20 Search Results

    74LV20 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LV20AFPEL-E Renesas Electronics Corporation HD74LV-A Series Visit Renesas Electronics Corporation
    74LV20ATELL-E Renesas Electronics Corporation HD74LV-A Series Visit Renesas Electronics Corporation
    SN74LV20ADG4 Texas Instruments Dual 4-Input Positive-NAND Gate 14-SOIC -40 to 85 Visit Texas Instruments
    SN74LV20AD Texas Instruments Dual 4-Input Positive-NAND Gate 14-SOIC -40 to 85 Visit Texas Instruments Buy
    SN74LV20ADBR Texas Instruments Dual 4-Input Positive-NAND Gate 14-SSOP -40 to 85 Visit Texas Instruments Buy
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    74LV20 Price and Stock

    Texas Instruments SN74LV20ADR

    IC GATE NAND 2CH 4-INP 14SOIC
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    DigiKey SN74LV20ADR Digi-Reel 6,098 1
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    Mouser Electronics SN74LV20ADR 6,833
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    Rochester Electronics SN74LV20ADR 765 1
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    Texas Instruments SN74LV20ANSR

    IC GATE NAND 2CH 4-INP 14SO
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    Rochester Electronics SN74LV20ANSR 5,545 1
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    Texas Instruments SN74LV20ADBR

    IC GATE NAND 2CH 4-INP 14SSOP
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    Mouser Electronics SN74LV20ADBR
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    Rochester Electronics SN74LV20ADBR 23,465 1
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    Texas Instruments SN74LV20APWR

    IC GATE NAND 2CH 4-INP 14TSSOP
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    DigiKey SN74LV20APWR Cut Tape 2,596 1
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    SN74LV20APWR Digi-Reel 2,596 1
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    Mouser Electronics SN74LV20APWR 3,875
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    Bristol Electronics SN74LV20APWR 1,445
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    Rochester Electronics SN74LV20APWR 200 1
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    Texas Instruments SN74LV20ADGVR

    IC GATE NAND 2CH 4-INP 14TVSOP
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    DigiKey SN74LV20ADGVR Cut Tape 1,996 1
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    SN74LV20ADGVR Reel 2,000
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    Mouser Electronics SN74LV20ADGVR 1,605
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    Rochester Electronics SN74LV20ADGVR 21,401 1
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    74LV20 Datasheets (36)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LV20 Philips Semiconductors Dual 4-input NAND gate Original PDF
    74LV20D Philips Semiconductors Dual 4-Input NAND Gate Original PDF
    74LV20D Philips Semiconductors Dual 4-input NAND gate Original PDF
    74LV20D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LV20D Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20D Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20D Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20D Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20D Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20DB Philips Semiconductors Dual 4-input NAND gate Original PDF
    74LV20DB Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LV20DB Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20DB Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20DB Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20DB Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20DB Philips Semiconductors Dual 4-input NAND gate Scan PDF
    74LV20DB-T Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LV20D-T Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74LV20N Philips Semiconductors Dual 4-input NAND gate Original PDF
    74LV20N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF

    74LV20 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LV20

    Abstract: 74LV20D
    Text: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product data Supersedes data of 1998 Apr 20 Philips Semiconductors 2003 Mar 10 Philips Semiconductors Product data Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 V to 3.6 V


    Original
    PDF 74LV20 74LV20 74HC/HCT20. 74LV20D

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product data Supersedes data of 1998 Apr 20 Philips Semiconductors 2003 Mar 10 Philips Semiconductors Product data Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 V to 3.6 V


    Original
    PDF 74LV20 74LV20

    74LV20

    Abstract: 74LV20PW
    Text: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product specification Supersedes data of 1997 Mar 28 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V


    Original
    PDF 74LV20 74LV20 74HC/HCT20. 74LV20PW

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product specification Supersedes data of 1996 Feb IC24 Data Handbook Philips Semiconductors 1996 Mar 28 Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V


    Original
    PDF 74LV20 74LV20

    Untitled

    Abstract: No abstract text available
    Text: SN54LV20A, 74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV20A . . . J OR W PACKAGE 74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original
    PDF SN54LV20A, SN74LV20A SCES339B 000-V A114-A) A115-A) SN54LV20A SN74LV20A

    A115-A

    Abstract: C101 SN54LV20A SN74LV20A 74LV20a
    Text: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


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    PDF SN54LV20A, SN74LV20A SCES339E 000-V A114-A) A115-A) SN54LV20A A115-A C101 SN54LV20A SN74LV20A 74LV20a

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


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    PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    A115-A

    Abstract: C101 SN54LV20A SN74LV20A
    Text: SN54LV20A, 74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339C – SEPTEMBER 2000 – REVISED JULY 2003 D D D D SN54LV20A . . . J OR W PACKAGE 74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 6 ns at 5 V Typical VOLP (Output Ground Bounce)


    Original
    PDF SN54LV20A, SN74LV20A SCES339C SN54LV20A 000-V A114-A) A115-A) A115-A C101 SN54LV20A SN74LV20A

    A115-A

    Abstract: C101 SN54LV20A SN74LV20A
    Text: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original
    PDF SN54LV20A, SN74LV20A SCES339E 000-V A114-A) A115-A) SN54LV20A A115-A C101 SN54LV20A SN74LV20A

    A115-A

    Abstract: C101 SN54LV20A SN74LV20A
    Text: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original
    PDF SN54LV20A, SN74LV20A SCES339E 000-V A114-A) A115-A) SN54LV20A A115-A C101 SN54LV20A SN74LV20A

    A115-A

    Abstract: C101 SN54LV20A SN74LV20A
    Text: SN54LV20A, 74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV20A . . . J OR W PACKAGE 74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


    Original
    PDF SN54LV20A, SN74LV20A SCES339B SN54LV20A 000-V A114-A) A115-A) A115-A C101 SN54LV20A SN74LV20A

    A115-A

    Abstract: C101 SN54LV20A SN74LV20A
    Text: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original
    PDF SN54LV20A, SN74LV20A SCES339E 000-V A114-A) A115-A) SN54LV20A A115-A C101 SN54LV20A SN74LV20A

    OF4455

    Abstract: OT239 philips AS2000P triac ot239 phx4nq60e of4453 TDA8855H OF4455 diode OF4453 diode AS2000P
    Text: Philips Semiconductors Product Discontinuation Notice DN53 Exhibit A June 30, 2004 SEE DN53 NOTICE LETTER FOR APPLICABLE LAST TIME BUY TERMS, CONDITIONS AND CODE DEFINITIONS FOR THESE DISCONTINUED PRODUCTS. REFER TO PHILIPS WEB-SITE "http://www.semiconductors.philips.com/eol FOR ADDED INFORMATION.


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    PDF Code357A3 30-Jun-04 VY27357A3 OF4455 OT239 philips AS2000P triac ot239 phx4nq60e of4453 TDA8855H OF4455 diode OF4453 diode AS2000P

    BUK2114

    Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
    Text: Index Type number Page number 1N4148 34 1N4531 34 1N47xxA series 44 1PS10SB62 32 1PS10SB63 32 1PS10SB82 32 1PS181 36 1PS184 36 1PS193 34 1PS226 36 1PS59SB10 28 1PS59SB14 28 1PS59SB15 28 1PS59SB16 28 1PS59SB20 30 1PS59SB21 28 1PS66SB17 32 1PS66SB62 32 1PS66SB63


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    PDF 1N4148 1N4531 1N47xxA 1PS10SB62 1PS10SB63 1PS10SB82 1PS181 1PS184 1PS193 1PS226 BUK2114 BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52

    74LV20

    Abstract: 74LV20PW
    Text: Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.


    OCR Scan
    PDF 74LV20 SQT402-1 MO-153 74LV20 74LV20PW

    Untitled

    Abstract: No abstract text available
    Text: IN TEG R ATE D C IR C U ITS 74LV20 Dual 4-input NAND gate Product specification 1997 Apr 07 IC24 Data Handbook Philips Semiconductors PHILIPS PHILIPS Philips Semiconductors Product specification Dual 4 - in p u t NAN D gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V


    OCR Scan
    PDF 74LV20 74LV20 74HC/HCT20.

    74LV20

    Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW
    Text: Product Specification Philips Semiconductors 74LV20 Dual 4-input NAND gate QUICK REFERENCE DATA FEATURES • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical V0LP output ground


    OCR Scan
    PDF 74LV20 74LV20 74HC/HCT20. 711002b 74LV20D 74LV20DB 74LV20N 74LV20PW

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS [M m S P IE 74LV20 Dual 4-input NAND gate Product specification Supersedes data of 1997 Mar 28 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 PHILIPS Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES


    OCR Scan
    PDF 74LV20 74LV20 74HC/HCT20.

    74LV20

    Abstract: 74LV20PW MS-012AB
    Text: Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.


    OCR Scan
    PDF 74LV20 74HC/HCT20. SQT402-1 MO-153 74LV20PW MS-012AB

    74LV20

    Abstract: 74LV20PW
    Text: Philips Sem iconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.


    OCR Scan
    PDF 74LV20 SQT402-1 MO-153 74LV20 74LV20PW

    74LV20

    Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337
    Text: Philips Semiconductors Preliminary Specification Dual 4-input NAND gate FEATURES 74LV20 QUICK REFERENCE DATA GND = 0 V; = 25°C; t, = t, < 2.5 ns • Optimized fo r Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between Vcc = 2.7 V and


    OCR Scan
    PDF 74LV20 74LV20 74HC/HCT20. 7110flEb 33vcc 71106EL 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337

    Untitled

    Abstract: No abstract text available
    Text: Philip s Sem iconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT20. • Accepts TTL input levels between V cc = 2-7V and Vcc = 3.6V


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    PDF 74LV20 --25cC 74LV20 74HC/HCT20.

    octal Bilateral Switches

    Abstract: 74LVC162244A 74LV74 74LVC377
    Text: Philips Semiconductors Advanced Low Voltage CMOS FUNCTION SELECTION GUIDE FUNCTION SELECTION GUIDE LV FAMILY GATES INVERTERS NAND AND NOR FUNCTION DEVICE NUMBER Hex Inverter 74LV04 Hex Inverter unbuffered 74LVUÛ4 Hex Inverter (Schmitt-Trigger) 74LV14 Quad 2-input


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    PDF 74LV04 74LVU 74LV14 74LV00 74LV03 74LV10 74LV20 74LV132 74LV08 74LV11 octal Bilateral Switches 74LVC162244A 74LV74 74LVC377

    74LVC162244A

    Abstract: SCHMITT-TRIGGER 3 state 5v tolerant HEX SCHMITT-TRIGGER INVERTER SPICE 74LV74 74LVC377
    Text: Philips Semiconductors Functional Index IC24: ADVANCED LOW VOLTAGE CMOS LOGIC Preface .


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    PDF OT355-1 OT362-1 OT364-1 PLCC20: PLCC28: OT261-3 74LVC162244A SCHMITT-TRIGGER 3 state 5v tolerant HEX SCHMITT-TRIGGER INVERTER SPICE 74LV74 74LVC377