74LVX112SJ Search Results

74LVX112SJ Datasheets (6)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74LVX112SJ		Fairchild Semiconductor	Low Voltage Dual J-K Flip-Flops with Preset and Clear	Original	PDF	58.16KB	6
74LVX112SJ		Fairchild Semiconductor	Logic - Flip Flops, Integrated Circuits (ICs), IC JK TYPE NEG TRG DUAL 16SOP	Original	PDF		7
74LVX112SJ		National Semiconductor	Low Voltage Dual J-K Flip-Flops with Preset and Clear	Original	PDF	135.97KB	8
74LVX112SJX		Fairchild Semiconductor	Low Voltage Dual J-K Flip-Flops with Preset and Clear	Original	PDF	58.16KB	6
74LVX112SJX		Fairchild Semiconductor	Low Voltage Dual J-K Flip-Flops with Preset and Clear	Original	PDF	78.12KB	7
74LVX112SJX		National Semiconductor	Low Voltage Dual J-K Flip-Flops with Preset and Clear	Original	PDF	135.97KB	8

74LVX112SJ Price and Stock

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Rochester Electronics LLC 74LVX112SJ IC FF JK TYPE DOUBLE 1BIT 16SOP
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	74LVX112SJ	Tube	12,126		1,040	1 - 10 - 100 - 1000 - 10000 $0.29	Buy Now
FAIRCHILD 74LVX112SJ 74LVX112SJ
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Verical	74LVX112SJ		12,126		1,304	1 - 10 - 100 - 1000 - 10000 $0.26	Buy Now
Fairchild Semiconductor Corporation 74LVX112SJ J-K Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	74LVX112SJ		12,126		1	1 - 10 - 100 $0.28 1000 $0.23 10000 $0.21	Buy Now

74LVX112SJ Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74LVX112 Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16 Contextual Info: 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK and outputs (Q, Q). These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse. Triggering occurs at a voltage level of	Original	74LVX112 LVX112 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ M16A M16D MTC16	PDF
5555 FAIRCHILD optocoupler Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference	Original	SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N	PDF
74LVX112 Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16 Contextual Info: Revised December 2003 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK and outputs (Q, Q). These devices are edge sensitive and	Original	74LVX112 LVX112 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ M16A M16D MTC16	PDF
Contextual Info: Revised March 1999 SEMICONDUCTOR TM General Description The inputs tolerate voltages up to 7V allowing the interface of 5V system s to 3V system s. Features • Input voltage level translation from 5 V -3 V ■ Ideal fo r low pow er/low noise 3.3V applications	OCR Scan	74LVX112 74LVX112 LVX112	PDF
Contextual Info: S E M IC O N D U C T O R 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description Th e inputs tolerate voltages up to 7V allowing the interface of 5V system s to 3V system s. The LVX112 is a dual J-K Flip-Flop where each flip-flop has	OCR Scan	74LVX112 LVX112 2314-006I	PDF
MTC 25-16 Abstract: 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16 Contextual Info: A I R C H I I- D S E M IC O N D U C T O R im 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The inputs tolerate voltages up to 7 V allowing the interface of 5V system s to 3 V system s. The LVX112 is a dual J-K Flip-Flop w here each flip-flop has	OCR Scan	74LVX112 LVX112 MTC 25-16 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ M16A M16D MTC16	PDF
74LVX112 Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16 AD508 Contextual Info: S E M I C O N D U C T O R Revised March 1999 TM General Description either state without affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. The inputs tolerate voltages up to 7V allowing the interface	OCR Scan	74LVX112 LVX112 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ M16A M16D MTC16 AD508	PDF
74LVX112 Abstract: 74LVX112M 74LVX112MTC 74LVX112MTCX 74LVX112MX 74LVX112SJ 74LVX112SJX LVX112 M16A M16D Contextual Info: 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J K PRESET CLEAR and CLOCK and outputs (Q Q) These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse Triggering occurs at a voltage level	Original	74LVX112 LVX112 74LVX112 74LVX112M 74LVX112MTC 74LVX112MTCX 74LVX112MX 74LVX112SJ 74LVX112SJX M16A M16D	PDF
MC0628R Abstract: 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference	Original	SCYB017A T74ALVC32374 74CBTLV16211 SN74CBTD16211 SN74SSTV16859 SN74CBTLV16211GRDR SN74ALVC16245AGRDR -SN74SSTV16859GKER MC0628R 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE	PDF
Contextual Info: A I R C H October 1996 I L D Revised March 1999 S E M [CONDUCTOR TM 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK	OCR Scan	74LVX112 LVX112	PDF
74LVX112 Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16 Contextual Info: Revised March 1999 74LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK and outputs (Q, Q). These devices are edge sensitive and	Original	74LVX112 LVX112 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ M16A M16D MTC16	PDF
5555 FAIRCHILD optocoupler Abstract: DM74LS75N MC74HC373DW 74hc14n equivalent HCF4060BE 40373 NC7S125M5X datasheet 14543 motorola 14049 CD40106BE Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference	Original	SCYB017A A010203 5555 FAIRCHILD optocoupler DM74LS75N MC74HC373DW 74hc14n equivalent HCF4060BE 40373 NC7S125M5X datasheet 14543 motorola 14049 CD40106BE	PDF