2A118

Contextual Info: Revised March 2001 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32500 is an 32-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

Contextual Info: Preliminary Revised November 2004 74VCX32245 Low Voltage 32-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs Preliminary General Description The VCX32245 contains thirty-two non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus

74VCX32374

Abstract: 74VCX32374GX MO-205 VCX32374
Contextual Info: Revised August 2001 74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable (OE) are common to

74VCX32244

Abstract: 74VCX32244GX MO-205 VCX32244
Contextual Info: Preliminary Revised September 2000 74VCX32244 Low Voltage 32-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and

74VCX32373

Abstract: 74VCX32373GX MO-205 VCX32373
Contextual Info: Preliminary Revised August 2001 74VCX32373 Low Voltage 32-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32373 contains thirty-two non-inverting latches with 3-STATE outputs and is intended for bus oriented

Contextual Info: Preliminary Revised June 1999 74VCX32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32 contains four 2-input OR gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications

Contextual Info: Preliminary Revised September 2000 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32500 is an 18-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

Contextual Info: Revised May 2001 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32500 is an 32-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

Contextual Info: Revised November 2004 74VCX32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32 contains four 2-input OR gates. This product is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V.

74VCX32

Abstract: 74VCX32M 74VCX32MTC M14A MTC14
Contextual Info: Revised July 1999 74VCX32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32 contains four 2-input OR gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V.

1A12

Abstract: 1A15 74VCX32500 74VCX32500GX MO-205 VCX32500
Contextual Info: Preliminary Revised January 2001 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32500 is an 18-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

74VCX32374

Abstract: 74VCX32374G MO-205 VCX32374
Contextual Info: Revised November 2002 74VCX32374 Low Voltage 32-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable (OE) are common to

74VCX32244

Abstract: 74VCX32244GX MO-205 VCX32244
Contextual Info: Revised August 2001 74VCX32244 Low Voltage 32-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32244 contains thirty-two non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/

Contextual Info: Revised May 2001 74VCX32374 Low Voltage 32-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable (OE) are common to

74VCX32374

Abstract: 74VCX32374GX MO-205 VCX32374
Contextual Info: Revised December 2000 74VCX32374 Low Voltage 32-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable (OE) are common to

74VCX32373GX

Abstract: MO-205 VCX32373 74VCX32373
Contextual Info: Preliminary Revised February 2001 74VCX32373 Low Voltage 32-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32373 contains thirty-two non-inverting latches with 3-STATE outputs and is intended for bus oriented

74VCX32

Abstract: 74VCX32BQX 74VCX32M 74VCX32MTC M14A MLP014A MO-241 MTC14
Contextual Info: Revised February 2005 74VCX32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32 contains four 2-input OR gates. This product is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V.

74VCX32244

Abstract: 74VCX32244G MO-205 VCX32244
Contextual Info: Revised November 2002 74VCX32244 Low Voltage 32-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs General Description The VCX32244 contains thirty-two non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/

74VCX32

Abstract: 74VCX32M 74VCX32MTC M14A MTC14
Contextual Info: Revised January 2001 74VCX32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32 contains four 2-input OR gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V.

VCX32500

Abstract: 1A12 1A15 74VCX32500 74VCX32500GX MO-205
Contextual Info: Revised September 2001 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32500 is an 36-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

2A118

Contextual Info: Revised August 2001 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32500 is an 32-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

Contextual Info: Preliminary Revised September 2000 74VCX32374 Low Voltage 32-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32374 contains thirty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and output enable (OE) are common to

Contextual Info: Revised August 2004 74VCX32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32 contains four 2-input OR gates. This product is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V.

2A118

Abstract: BGA11
Contextual Info: Preliminary Revised September 2000 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs Preliminary General Description Features The VCX32500 is an 18-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data