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    Rochester Electronics LLC N80960SB10

    IC MPU I960 10MHZ 84PLCC
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    80960SB Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Type PDF
    80960SB Intel EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS Original PDF
    80960SB-16 Intel Embedded 32-bit Microprocessor With 16-bit Burst Data Bus Original PDF

    80960SB Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    80960SA

    Abstract: 80960SB 65A176 AD427
    Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded ■ Pin Compatible with 80960SB Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache


    Original     		PDF 80960SA 32-BIT 16-BIT 80960SB 512-Byte 80960SA 80960SB 65A176 AD427

    QFP PACKAGE thermal resistance

    Abstract: 80960SA 80960SB N80960SB1 65A176 AD928
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture ■ Built-in Interrupt Controller — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache


    Original     		PDF 80960SB 32-BIT 16-BIT 512-Byte 80960SA 80960SA 80960SB QFP PACKAGE thermal resistance N80960SB1 65A176 AD928

    QFP PACKAGE thermal resistance

    Abstract: 65a176 AD427 80960SA 80960SB x80960SB 272207 D010D
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture ■ Built-in Interrupt Controller — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache


    Original     		PDF 80960SB 32-BIT 16-BIT 512-Byte 80960SA 80960SA 80960SB QFP PACKAGE thermal resistance 65a176 AD427 x80960SB 272207 D010D

    micro instruction set of I960 hx

    Abstract: 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960
    Text: Intel i960® Processors i960® Architecture Family Product Highlights • 32-bit register-based RISC core in all processors ■ Code compatibility across entire product line ■ Broad selection of price and performance levels ■ Ideal for networking and imaging


    Original     		PDF 32-bit JT-100 USA/1001/500/IL11444 micro instruction set of I960 hx 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960

    IN1016

    Abstract: 80960HA 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT PQFP 128 Fast Ethernet Risc
    Text: i960 JA/JF/JD/JT Microprocessors PRODUCT HIGHLIGHTS • Low Power Modes ■ Improved cache design ■ State of the art testability ® ■ i960 processor compatible RISC core ■ 100 MIPS execution for the JT-100 ■ 16-Kbyte 2-way set associative instruction


    Original     		PDF JT-100 16-Kbyte 32-bit JT-100 /0398/5K/IL0316 IN1016 80960HA 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT PQFP 128 Fast Ethernet Risc

    80960CF

    Abstract: 80960JA 80960CA 80960HA 80960HT 80960JD 80960JF 80960KA 80960SA 80960SB
    Text: SOFTWARE DEVELOPMENT TOOLS CYGNUS Cygnus Developers Kit for the i960 Processor Family • ■ ■ ■ ■ ■ ■ ■ ■ ■ ANSI Conformant GNU C CompilerGCC GNU C+ Compiler - G+ Windowing, Source Level GNU Debugger - GDB Graphical User Interface for GDB


    Original     		PDF RS/6000 80960CF 80960JA 80960CA 80960HA 80960HT 80960JD 80960JF 80960KA 80960SA 80960SB

    80960CA

    Abstract: 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA
    Text: i960 MICROPROCESSOR BENCHMARK REPORT Order Number: 272950-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in


    Original     		PDF sustainin12 20Mhz 25Mhz 33Mhz 40Mhz 25/50Mhz 80960CA 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA

    1794-OB16

    Abstract: Allen-Bradley 1794 ie8 program example 1794-If41 Allen-Bradley 1794-ie8 manual Allen-Bradley 1794 ASB MANUAL 1794-OB16P 1794 IF41 1794-OE4 1794-IE8 Allen-Bradley 1794-OB16
    Text: IMC S Class Compact Motion Controllers IMC-S/23x Models Product Data Product Description The IMC-S/23x is a compact, rugged, microprocessor-based two- or four-axis servo motion controller. By including the logic and field power supplies, the IMC-S/23x provides a completely programmable,


    Original     		PDF IMC-S/23x IMC-S/23x, 1794-OB16 Allen-Bradley 1794 ie8 program example 1794-If41 Allen-Bradley 1794-ie8 manual Allen-Bradley 1794 ASB MANUAL 1794-OB16P 1794 IF41 1794-OE4 1794-IE8 Allen-Bradley 1794-OB16

    VL82C486-FC2

    Abstract: CXD1160AQ VL82C486 VL82C315 XC3042-100PQ100C XC3020-70-PQ100C NCR53C700 NCR53C720 xc3042-100pq CXD1160
    Text: Issued March 1999 232-5109 Data Pack H Surface mount test clips Manufacturers device number to RS stock number cross reference Data Sheet N.B. Some devices have the same basic type numbers but are available in several package styles. Before selecting a test clip ensure that the package type matches that of the device to be tested.


    Original     		PDF A1280 A1425 A1460 ATT1C05 CL-GD6440 CL-SII260-15QC-D VL82C486-FC2 CXD1160AQ VL82C486 VL82C315 XC3042-100PQ100C XC3020-70-PQ100C NCR53C700 NCR53C720 xc3042-100pq CXD1160

    sun hold RAS 0610

    Abstract: eeprom programmer schematic 24c08 80960KB Programmer Reference manual 270929 KDS crystal 20.000 zilog 4202 IC 24c08 PCI cyclone 3 schematics KDS 4.000 Crystal cpu 80960kx
    Text: i960 Microprocessor User’s Guide for Cyclone and PCI-SDK Evaluation Platforms April 1996 Order Number: 272577-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original     		PDF Z8536 sun hold RAS 0610 eeprom programmer schematic 24c08 80960KB Programmer Reference manual 270929 KDS crystal 20.000 zilog 4202 IC 24c08 PCI cyclone 3 schematics KDS 4.000 Crystal cpu 80960kx

    v945

    Abstract: 80960SA N80960SB W225 80960SB N80960SA S80960SA S80960SB intel DOC n80960
    Text: 80960SA/SB SPECIFICATION UPDATE Release Date: June, 1997 Order Number: 272850-002 The 80960SA/SB may contain design defects or errors known as errata which may cause the 80960SA/SB to deviate from published specifications. Current characterized errata are documented in this Specification Update.


    Original     		PDF 80960SA/SB 80960SA/SB v945 80960SA N80960SB W225 80960SB N80960SA S80960SA S80960SB intel DOC n80960

    automatic room power control circuit block diagram

    Abstract: 80960 80960KB Programmer Reference manual 8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer E-NAND tag 8610 stt 7000 NMOS F12 diode I-35 L Diode IR 1254
    Text: i960 Jx Microprocessor User’s Manual September 1994 Order Number: 272483-001 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein.


    Original     		PDF Index-13 Index-14 automatic room power control circuit block diagram 80960 80960KB Programmer Reference manual 8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer E-NAND tag 8610 stt 7000 NMOS F12 diode I-35 L Diode IR 1254

    80960CA

    Abstract: 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA
    Text: i960 Microprocessor Benchmark Report January 1998 Order Number: 272950-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability


    Original     		PDF 20Mhz 25Mhz 33Mhz 40Mhz 25/50Mhz 20/60Mhz 80960CA 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA

    CXD1160aq

    Abstract: VL82C486-FC2 VL82C486FC NCR53C720 vl82c486 cxd1160 74HC125 EPM7128 d75304gf A1280
    Text: Issued March 1997 232-5109 Data Pack H Surface mount test clips Manufacturers device number to RS stock number cross reference Data Sheet N.B. Some devices have the same basic type numbers but are available in several package styles. Before selecting a test clip ensure that the package type matches that of the device to be tested.


    Original     		PDF A1240-2 A1240A-2 A1280 A1425 A1460 CXD1160aq VL82C486-FC2 VL82C486FC NCR53C720 vl82c486 cxd1160 74HC125 EPM7128 d75304gf A1280

    Untitled

    Abstract: No abstract text available
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached


    OCR Scan     		PDF 80960SB 32-BIT 16-BIT 512-Byte 80960SA 32-Blt

    Untitled

    Abstract: No abstract text available
    Text: in te i 80960SA/80960SB EMBEDDED 32-BIT PROCESSORS WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 16 MIPS Burst Execution at 16 MHz — 5 MIPS* Sustained Execution at 16 MHz Built-In Interrupt Controller — 4 Direct Interrupt Pins — 32 Priority Levels 256 Vectors


    OCR Scan     		PDF 80960SA/80960SB 32-BIT 16-BIT 80960SB 512-Byte

    80960SB

    Abstract: No abstract text available
    Text: Floating-Point Instructions 1Q CHAPTER 10 FLOATING-POINT INSTRUCTIONS This chapter describes the floating-point processing capabilities of the 80960SB processor. The subjects discussed include the real number data types, the execution environment for floating-point operations, the floating-point instructions, and fault and exception handling.


    OCR Scan     		PDF 80960SB

    VAX-11

    Abstract: 272207
    Text: in t t J P ß m oM ow A nv 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped


    OCR Scan     		PDF 80960SB 32-BIT 16-BIT 512-Byte 80960KA/ 80960SA 8096SA VAX-11 272207

    advantages of instruction set architecture intel i3

    Abstract: No abstract text available
    Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • H ig h -P e rfo rm a n c e E m bedded A rc h ite c tu re — 16 M IPS* B u rst E xecution at 16 M H z — 5 M IPS S u stain ed E xecution at 16 M Hz ■ B uilt-in In te rru p t C o n tro lle r


    OCR Scan     		PDF 80960SB 32-BIT 16-BIT 80960SA at50-1000 advantages of instruction set architecture intel i3

    n80960sb

    Abstract: No abstract text available
    Text: in tj 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ Built-In Interrupt Controller — 4 Direct Interrupt Pins


    OCR Scan     		PDF 80960SB 32-BIT 16-BIT 512-Byte 16-Bit 8096SA MflEbl75 n80960sb

    VAX-11

    Abstract: PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode
    Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped


    OCR Scan     		PDF 80960SA 32-BIT 16-BIT 512-Byte Local\32-Bit 80960SB 80-Lead VAX-11 PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode

    80960SA

    Abstract: 80960SB 80960
    Text: Instruction Set g CHAPTER 9 INSTRUCTION SET This chapter provides an overview of the instruction set for the 80960SA/SB processor. Included is a discussion of the instruction format, a summary of the instruction groups and the instructions in each group. This chapter gives detailed descriptions of each of the instructions. The instructions are listed


    OCR Scan     		PDF 80960SA/SB 80960SA 80960SB 80960

    Intel i960 architecture

    Abstract: 80960SA 80960SB A80960SA 80960sa manual
    Text: Guide to This Manual 7 CHAPTER 1 GUIDE TO THIS MANUAL INTRODUCTION This manual provides reference information applicable to the 80960SA/SB embedded processor. It is intended for use by both software and hardware designers fam iliar with the principles of microprocessors and with the 80960SA/SB architecture.


    OCR Scan     		PDF 80960SA/SB 80960SB 80960SA Intel i960 architecture A80960SA 80960sa manual

    80960SA

    Abstract: 80960SB
    Text: Introduction to ¡960 Architecture 2 CH A PTER 2 IN TR O D U C T IO N TO i960™ A R C H ITE C TU R E This chapter provides an overview of the architecture on which the 80960 series o f processors is based. AN EMBEDDED 32-BIT ARCHITECTURE FROM INTEL The 80960SA/SB processor marks the continuation o f the i960 architecture series — an


    OCR Scan     		PDF 32-BIT 80960SA/SB 16-bit 80960SA 80960SB